Timing attack

About: Timing attack is a research topic. Over the lifetime, 726 publications have been published within this topic receiving 25462 citations.

A Salient Missing Link in RFID Security Protocols

Abstract: In side channel analysis, an attacker utilizes some legitimate function queries in order to collect the corresponding responses of a cryptographic system while it is functioning in a normal mode. If those responses reveal some unwanted information about the secrecy or privacy, this leakage is called side channel information and these responses are called side channels. In this respect, careless deployments of "secure" RFID authentication protocols are not exceptions and subject to side channel attacks. Focusing on lightweight RFID security protocols; we examine the server responses for several RFID tags and realize that if the database querying is performed through a static process, the RFID system is subject to timing attacks that could easily jeopardize the system's untraceability criteria. We demonstrate our attack on some well-known protocols and outline a countermeasure by precisely describing the database query mechanism. Furthermore, we analyze the success probability of the attack in terms of the system parameters such as the number of tags, number of cryptographic operations that have to be carried out, and server's computational power.

Collision Timing Attack when Breaking 42 AES ASIC Cores.

Abstract: A collision timing attack which exploits the data-dependent timing characteristics of combinational circuits is demonstrated. The attack is based on the correlation collision attack presented at CHES 2010, and the timing attributes of combinational circuits when implementing complex functions, e.g., S-boxes, in hardware are exploited by the help of the scheme used in another CHES 2010 paper namely fault sensitivity analysis. Similarly to other side-channel collision attacks, our approach avoids the need for a hypothetical model to recover the secret materials. The results when attacking all 14 AES ASIC cores of the SASEBO LSI chips in three different process technologies, 130nm, 90nm, and 65nm, are presented. Successfully breaking the DPA-protected and the fault attack protected cores indicates the strength of the attack.

A new pseudo-random number generator with application in RSA

Abstract: This paper presents a new pseudo-random number generator, named IPCS-PRNG (Inter-Perturbations of Chaotic Systems based Pseudo-Random Number Generator), which uses the sequences generated by two chaotic systems to inter-perturb their sequence values and control parameter. The cryptographic properties of inter-perturbing sequence, which is called IP sequence in the context, are analyzed theoretically. The sensitive dependence on initial conditions, distribution, auto-correlation and cross-correlation are tested. The stability of IP sequence and logistic map is compared. A text is encrypted by RSA with IPCS-PRNG, which strengthens the ability of resisting chosen ciphertext attack, common module attack, low exponent attack and timing attack of RSA.

Side-Channel Security on Key Exchange Protocol: Timing and Relay Attacks

Abstract: The advancing of Key Exchange Protocol (KEP) is compulsory to secure the connected world via Internet of Thing (IoT), cryptocurrency and blockchain, virtual intelligent, smart computing etc. To address the security issues in the Internet based computing systems, this paper explores the side-channel security for KEP, namely timing and relay attacks. Nowadays, various KEP variances are used by internet protocol such as IKEv2/3. The purpose of KEP is to enable a secret key(s) sharing between two or more computing systems on unsecure network. Later, the secret key(s) is used to encrypt all data transmitted for online systems such as internet banking, cryptocurrency transaction, IoT services etc. The timing attack was addressed by an adversary model and security assumptions. The relay attack on KEP was tested by an experiment testbed between a key fob and car using Raspberry Pi and RF module. The experiment result has shown that the propagation delay of KEP on RF communication is increased by 100% for each relay node. If the KEP runtime is increased greater than 50%, the KEP authentication key should be discarded to prevent the attacker from gaining access to the car.

Formal approaches to countering side-channel attacks

Abstract: Cryptographic algorithms are often modeled as idealized mappings from input to output. This is a problematic over-simplification. A villain determined to break cryptography will use all available information and will not restrict himself to the analysis of ciphertexts and public key material. So-called side-channel attacks demonstrate that characteristics such as the timing behavior of an algorithm’s implementation can be effectively exploited for cryptanalysis. In this thesis, we provide mathematically rigorous methods that allow for the detection, quantification, and elimination of side-channels. We focus on side-channels due to timing behavior and side-channels that arise from thread interleavings in multithreaded programs. We present a novel method for detecting timing leaks in synchronous systems. The method is based on a parameterized and timing-sensitive notion of security that allows for the fine-grained modeling of information leakage. We present an efficient decision procedure for system security and show how it can be implemented in standard model-checking tools. We also present a model of adaptive side-channel attacks, which we combine with information-theoretic metrics to quantify the information revealed to an attacker. This allows us to express an attacker’s remaining uncertainty about a secret as a function of the number of side-channel measurements made. We present algorithms and approximation techniques for computing this measure. Furthermore, we demonstrate how both of our methods can be used to analyze the resistance of hardware implementations of cryptographic functions to timing attacks. We also present a method to detect and eliminate side-channels due to thread interleavings in multithreaded programs. Our approach uses unification on sub-programs to enforce that a program’s alternative execution paths do not reveal information about the secrets involved in branching decisions. We demonstrate that integrating our approach into an existing transforming type system can improve the precision of the analysis and the quality of the resulting programs.