Showing papers on "Topology (electrical circuits) published in 1996"

Design of logical topologies for wavelength-routed optical networks

Abstract: The problem of designing a logical topology over a wavelength-routed all-optical network (AON) physical topology is studied. The physical topology consists of the nodes and fiber links in the network. On an AON physical topology, we can set up lightpaths between pairs of nodes, where a lightpath represents a direct optical connection without any intermediate electronics. The set of lightpaths along with the nodes constitutes the logical topology. For a given network physical topology and traffic pattern, our objective is to design the logical topology and the routing algorithm so as to minimize the network congestion while constraining the average delay seen by a source-destination pair and the amount of processing required at the nodes (degree of the logical topology). Ignoring the delay constraints can result in fairly convoluted logical topologies with very long delays. On the other hand, in all our examples, imposing it results in a minimal increase in congestion. While the number of wavelengths required to imbed the resulting logical topology on the physical all optical topology is also a constraint in general, we find that in many cases of interest this number can be quite small. We formulate the combined logical topology design and routing problem described above as a mixed integer linear programming problem which we then solve for a number of cases of a six-node network. This programming problem is split into two subproblems: logical topology design, and routing. We then compare the performance of several heuristic topology design algorithms against that of randomly generated topologies, as well as lower bounds.

Some principles for designing a wide-area WDM optical network

Abstract: We explore design principles for next-generation optical wide-area networks, employing wavelength-division multiplexing (WDM) and targeted to nationwide coverage. This optical network exploits wavelength multiplexers and optical switches in routing nodes, so that an arbitrary virtual topology may be embedded on a given physical fiber network. The virtual topology, which is used as a packet-switched network and which consists of a set of all-optical "lightpaths", is set up to exploit the relative strengths of both optics and electronics-viz. packets of information are carried by the virtual topology "as far as possible" in the optical domain, but packet forwarding from lightpath to lightpath is performed via electronic switching, whenever required. We formulate the virtual topology design problem as an optimization problem with one of two possible objective functions: (1) for a given traffic matrix, minimize the network-wide average packet delay (corresponding to a solution for present traffic demands), or (2) maximize the scale factor by which the traffic matrix can be scaled up (to provide the maximum capacity upgrade for future traffic demands). Since simpler versions of this problem have been shown to be NP-hard, we resort to heuristic approaches. Specifically, we employ an iterative approach which combines "simulated annealing" (to search for a good virtual topology) and "flow deviation" (to optimally route the traffic-and possibly bifurcate its components-on the virtual topology). We do not consider the number of available wavelengths to be a constraint, i.e., we ignore the routing of lightpaths and wavelength assignment for these lightpaths. We illustrate our approaches by employing experimental traffic statistics collected from NSFNET.

A new Approach to Variable-Topology Shape Design Using a Constraint on the Perimeter

Abstract: This paper introduces a method for variable-topology shape optimization of elastic structures called theperimeter method. An upper-bound constraint on the perimeter of the solid part of the structure ensures a well-posed design problem. The perimeter constraint allows the designer to control the number of holes in the optimal design and to establish their characteristic length scale. Finite element implementations generate practical designs that are convergent with respect to grid refinement. Thus, an arbitrary level of geometric resolution can be achieved, so single-step procedures for topology design and detailed shape design are possible. The perimeter method eliminates the need for relaxation, thereby circumventing many of the complexities and restrictions of other approaches to topology design.

Method and apparatus for automatically configuring a network device to support a virtual network

Abstract: A networking system and automatic method in a networking system comprising at least one switching device and a plurality of at least one end-station interconnected with the at least one switching device, wherein the at least one switching device and at least one end-station are interconnected in a topology. A configuration device is included which has a configuration modification detection circuit for detecting the modification of the topology. A configuration policy maintenance circuit is provided for storing policies related to reconfiguring the at least one switching device upon the modification of the topology. A policy evaluation circuit is provided for determining which at least one end-station and ports should be grouped together upon the detection of the modification of the topology in a first manner. A reconfiguration circuit is provided for reconfiguring the at least one switching device in the first network to enable at least one end-station and ports to be grouped together in the first manner. Virtual local area networks may be created/extended/deleted during the reconfiguration to provide networking services to the at least one end-station.

Benefits of wavelength translation in all-optical clear-channel networks

Abstract: In this paper, we study the benefits of wavelength translation in all-optical networks providing clear channel circuit-switching among users. We first establish approximate analytical models for a static-routing circuit-switched network with an arbitrary topology, both with and without wavelength translation. We then study the performance of the nonblocking centralized switch, the mesh-torus network and the ring network, using the analytical models and simulation results. It is shown that the analytical models match the simulation results very well in the case of the centralized switch and the mesh network. The results of our study also show that the benefits of wavelength translation are modest for the centralized switch and the ring network. On the other hand, the results show that wavelength translation can significantly improve the performance of a large mesh-torus network.

Elimination of common mode voltage in three phase sinusoidal power converters

Abstract: This paper presents an active solution to a common-mode voltage created by typical three-phase inverters. It is shown that the addition of a fourth leg to the bridge of a three-phase inverter eliminates the common-mode voltage to ground created by the modulation of the inverter. An appropriate four-phase LC filter is inserted between the inverter and the load in order to create sinusoidal output line-to-line voltage. A simple modification of the modulation strategy is implemented for the four-phase inverter to achieve a three-phase wye-output neutral-to-ground voltage which is equal to zero at all times for an ideal inverter. The modulation strategy thereby completely eliminates the common-mode potential produced by traditional modulation techniques with traditional three-phase inverter topologies.

Automated Design of Both the Topology and Sizing of Analog Electrical Circuits Using Genetic Programming

Abstract: This paper describes an automated process for designing analog electrical circuits based on the principles of natural selection, sexual recombination, and developmental biology. The design process starts with the random creation of a large population of program trees composed of circuit-constructing functions. Each program tree specifies the steps by which a fully developed circuit is to be progressively developed from a common embryonic circuit appropriate for the type of circuit that the user wishes to design. The fitness measure is a user-written computer program that may incorporate any calculable characteristic or combination of characteristics of the circuit. The population of program trees is genetically bred over a series of many generations using genetic programming. Genetic programming is driven by a fitness measure and employs genetic operations such as Darwinian reproduction, sexual recombination (crossover), and occasional mutation to create offspring. This automated evolutionary process produces both the topology of the circuit and the numerical values for each component. This paper describes how genetic programming can evolve the circuit for a difficult-to-design low-pass filter.

A review of soft-switched DC-AC converters

Abstract: Soft-switching techniques have recently been applied in the design of DC-AC power converters, in order to achieve better performance, higher efficiency and higher power density. A substantial number of new topologies for different applications has been developed, however the amount of work that has been done in this field is not widely known. This paper is an attempt to classify the soft-switched DC-AC topologies in a simple and generic way. The topology classifications are based on the location of the resonant network (load, inverter bridge, and bus), the characteristic of switching waveforms (zero-voltage switching or zero-current switching), and the type of resonance (series or parallel), operating principles, performance, and design limitations are discussed. Some possible industrial applications of soft-switched DC-AC power converters are also addressed.

Apparatus for determining the topology of an ATM network or the like Via communication of topology information between a central manager and switches in the network over a virtual service path

Abstract: An asynchronous transfer mode (ATM) network or the like employing a method and apparatus for automatically determining the topology of the network is described. The method and apparatus provides for each switch in the network transmitting on each of its ports link advertisement messages (without processing intervention by intermediate switches). The link advertisement messages are received by neighbor switches and forwarded to a topology manager. The topology manager constructs network topology profile information based on received link advertisement messages. Further, the topology manager is able to verify bidirection links based on the received link advertisement messages.

Zero voltage and zero current switching full bridge PWM converter using secondary active clamp

Abstract: A new zero voltage and zero current switching (ZVZCS) full bridge (FB) PWM converter is proposed to improve the performance of the previously presented ZVZCS-FB-PWM converters. By adding a secondary active clamp and controlling the clamp switch moderately, ZVS (for leading leg switches) and ZCS (for lagging leg switches) are achieved without any lossy components, the reverse avalanche break down of leading-leg IGBTs or the saturable reactor in the primary. Many advantages including simple circuit topology, high efficiency, and low cost make the new converter attractive for high voltage and high power (>10 kW) applications. The principle of operation is explained and analyzed. The features and design considerations of the new converter are also illustrated and verified on a 1.8 kW, 100 kHz IGBT based experimental circuit.

Topology-based fault analysis in telecommunications networks

Abstract: A method and apparatus for detecting traffic-affecting failures in a telecommunications network; by inferring the most probable location of each such failure, given multiple alarm indicators along a network circuit; correlating circuit alarms to trunk failures, or inferring trunk failures from circuit alarms; inferring the location of major network outages by topologically correlating multiple trunk failures; and filtering alarm reporting to the Fault Management System users such that only the most significant derived or inferred conditions are automatically displayed.

Distributed internet monitoring system and method

Abstract: An internet monitoring system efficiently discovers topology data of a network by utilizing a distributed object model. The topology data represents the devices and interconnections of the network and can be used to display various conceptual views of the network at a management station. In accordance with the internet monitoring system, different sets of topology data are discovered with corresponding sets of computer-based stations, such as management stations or collection stations, by discovering the topology at respective regions of the network. Further, the different sets of topology data can be combined at a management station to derive a global view of the network. Both management and remote stations include a layout mechanism for receiving topology data and driving the output device based upon the topology data and a discovery mechanism for discovering and storing the topology data. The discovery mechanism includes a network monitor for discovering topology data corresponding with a particular station-specific region of the network, a topology database for storing topology data, and a topology manager for controlling the topology database. The management station, unlike the collection station, utilizes a replicator for communicating with at least one other station to receive topology data from a different region of the network and to forward the different set of topology data to its respective topology manager. The management station has algorithms for handling overlap in monitored regions through the choice of a primary station for each object monitored.

Characterization of an active clamp flyback topology for power factor correction applications

Abstract: Flyback derived power convertor topologies have long been attractive because of their relative simplicity when compared with other topologies used in low-power applications. Incorporation of active clamp circuitry provides the additional benefit of recycling transformer leakage energy while minimizing switch voltage stress. This paper presents the analysis, design, and experimental results of 500 W single stage and 600 W interleaved active clamp flybacks used for power factor correction. Several practical issues, including the application of charge control, the use of mixed power devices, and a solution to the hold-up time problem are discussed and experimentally verified.

Off-line flyback converter with input harmonic current correction

Abstract: An offline flyback power converter employing coupled primary transformer windings to achieve input harmonic current correction is introduced. By controlling the turn-ratio of the windings, the input current harmonic contents can be reduced to comply with EN611000-3-2 limits while boosting only slightly the bulk capacitor voltage. Such a topology allows the use of commercially available electrolytic capacitors for energy storage and introduces minimum cost penalty. The basic operation of the power converter is discussed and hardware results from a prototype circuit presented.

Automated WYWIWYG design of both the topology and component values of electrical circuits using genetic programming

Abstract: This paper describes an automated process for designing electrical circuits in which "What You Want Is What You Get" ("WYWIWYG" - pronounced "wow-eee-wig"). The design process uses genetic programming to produce both the topology of the desired circuit and the sizing (numerical values) for all the components of a circuit. Genetic programming successfully evolves both the topology and the sizing for an asymmetric bandpass filter that was described as being difficult-to-design in a leading electrical engineering journal. This evolved circuit is another instance in which a genetically evolved solution to a non-trivial problem is competitive with human performance.

A comparison between two current-fed push-pull DC-DC converters-analysis, design and experimentation

Abstract: This paper compares two current-fed push-pull DC-DC power converters: the current-fed push-pull power converter or isolated boost and an alternative topology named here as the dual inductor push-pull power converter (DIC). Since this latter converter has just one primary winding, the voltage across the main switches is reduced to the half of that in the isolated boost topology; the average current in the input inductors is also halved and the RMS current in the output capacitor is smaller. The overall efficiency is increased and the power converter's volume is reduced in the DIC converter. These and other improved design characteristics make this alternative topology more attractive than the isolated boost for equivalent applications. Analytical equations, output characteristic curves and computer simulations of both power converters are compared. An experimental breadboard of 480 W power has been assembled in order to verify the performance of the DIC power converter. The main results are provided.

Graphical representation of computer network topology and activity

Abstract: A means and method is disclosed for displaying an image on a display screen graphically representing the topology and information transfer activity occurring on a computer network. One host computer on the network denoted a network monitor gathers information about the topology and traffic on the network. A display image is generated depicting a substantially circular arrangement of host computers and/or sub-networks of host computers comprising the network. Color-coded, dashed, various width, or shaded line segments are added to the display image representing traffic (information transfer activity) occurring on the network between source and destination host computers. Line segments between communicating hosts are coded depending upon the volume of information being transferred. Line segments are removed when information flow between a pair of hosts ceases. Controls are provided to configure the display of the network and to move or zoom in on a portion of the display image.

Dynamic network topology determination

Abstract: A system and method for dynamically determining the physical connection topology between diverse network elements (DNEs) within a communication network. Each DNE is audited on a periodic basis to determine the arrangement, configuration, cross-connection, and alarm status of each communication port within each DNE in the communications network. A topology database is maintained with such baseline information. Each DNE is configured with at least one mismatched port. Mismatched ports are cross-connected with communication ports within DNEs so that signal mismatch alarms are generated by communication ports coupled with the mismatched ports in other DNEs. Signal mismatch alarms are collected and processed so that connectivity status may be derived based on the baseline data, expected alarms, and the receipt of such alarms or lack thereof. A topology database is continuously updated to reflect such derived information.

Differential current switch logic: a low power DCVS logic family

Abstract: Differential current switch logic (DCSL), a new logic family for implementing clocked CMOS circuits, has been developed. DCSL is in principle a clocked differential cascode voltage switch logic circuit (DCVS). The circuit topology outlines a generic method for reducing internal node swings in clocked DCVS logic circuits. In comparison to other forms of clocked DCVS, DCSL achieves better performance both in terms of power and speed by restricting internal voltage swings in the NMOS tree. DCSL circuits are capable of implementing high complexity high fan-in gates without compromising gate delay. Automatic lock-out of inputs on completion of evaluation is a novel feature of the circuit. Three forms of DCSL circuits have been developed with varying benefits in speed and power. SPICE simulations of circuits designed using the 1.2 /spl mu/m MOSIS SCMOS process indicate a factor of two improvement in speed and power over comparable DCVS gates for moderate tree heights.

Automated state model generation algorithm for power circuits and systems

Abstract: A new approach of automatically generating state-space models of power circuits and systems is presented. In this approach, the composite system state equations are established algorithmically given the standard node incidence matrix and elementary branch data (e.g. resistances, inductances, back emfs). The resulting state equations can be solved using a variety of numerical techniques or commercially available computer simulation programs. An example system consisting of a three-phase generator and rectifier load is used to illustrate this approach. Experimental verification is also provided.

Parallel active filter system implementation and design issues for utility interface of adjustable speed drive systems

Abstract: This paper presents a parallel active filter system implementation for utility interface of an an adjustable speed drive air-conditioner chiller application to meet IEEE 519 recommended harmonic standards. Specifications of displacement power factor, efficiency, cost, size and packaging requirements with the rectifier front-end topology are used to determine the optimal active filter solution. Design issues and interaction of parallel active filter inverter switching ripple filter, rectifier front-end and supply are addressed. A synchronous reference frame based controller and a predictive charge error based current regulator and their hardware implementation has been developed for the parallel active filter. Experimental results of the parallel active filter system are presented for a 'stiff' utility system interface of a 450 kW adjustable speed drive air-conditioner chiller application to meet IEEE 519 harmonic limits in the supply current.

Apparatus and method for discovering a topology for local area networks connected via transparent bridges

Abstract: A system of discovering the active topology of the LANs (local area networks) connected via any apparent bridges that conform to the IEEE 802.1D standard. A discovered active topology of the present invention consists of the active bridges, the LANs and the NMMs (network management modules) that constitute the bridged LAN. The system of the present invention advantageously utilizes the standard (IEEE 802.1D) defined behaviors of transparent bridges to discover the active topology. In so doing, the present invention does not require the bridges to issue any special proprietary frames for development of the active topology. The IEEE 802.1D conforming bridges have the property of forming a path between two conversing end stations. If the two end stations reside in adjacent LANs, the path between these two LANs only has the connecting bridge and no other LAN in between. The present invention utilizes this property in discovering the complete active topology of a bridged LAN via special communications between NMMs located on the LANs. Via cyclic processing and age out functions, the present invention is able to alter the active topology in response to changes within the bridged LAN.

Connectivity and sparse wavelength conversion in wavelength-routing networks

Abstract: Wavelength-routing networks offer the advantages of wavelength re-use and scalability over broadcast-and-select networks and are therefore suitable for wide area networks (WANs). We study the effects of topological connectivity and wavelength conversion in circuit-switched all-optical wavelength-routing networks. An approximate blocking analysis of such network is performed. We first propose an improved framework for the analysis of networks with arbitrary topology. We introduce a simple model for networks with a variable number of converters and analyze the effect of wavelength converter density on blocking probability. We then apply this framework to two sparse network topologies, the ring and the mesh-torus, and obtain the blocking performance. The results show that, in most cases, only a fraction of the network nodes need to be equipped with wavelength conversion capability for good performance. Finally, the tradeoff between physical connectivity, wavelength conversion, and the number of available wavelengths is studied through networks with random topologies.

The Effect of Topology on Estimates of Among-Site Rate Variation

Abstract: Among-site rate variation, as quantified by the gamma-distribution shape parameter, a or alpha, and the ratio of transition rate to transversion rate (Ts/Tv) influence phylogenetic inference. We examine the effect of topology on estimates of these two parameters in 12S rRNA sequences from nine species of mice belonging to the genera Onychomys and Peromyscus by generating 100 random topologies and estimating these parameters using parsimony and maximum-likelihood methods for each of the random topologies. The parsimony-based estimate of Ts/Tv from the well-corroborated topology falls within the distribution of estimates based on random topologies, whereas the maximum-likelihood estimate of Ts/Tv based on the well-corroborated topology lies well outside the distribution of estimates derived from random topologies. The Ts/Tv ratio derived via maximum-likelihood estimation is three times the parsimony-based estimate, suggesting that parsimony-based estimates are severe underestimates even when the correct topology is used. Both parsimony- and likelihood-based estimates of the gamma-distribution shape parameter (alpha) are sensitive to topology because the best estimates based on the well-corroborated topology are well outside the distributions of estimates derived from random topologies for both methods. We show that the reason for topology dependence is the presence of long internal branches in the underlying topology.

A novel soft-switched PWM inverter for AC motor drives

Abstract: A novel soft-switched inverter topology is derived from the passively clamped quasi-resonant link (PCQRL) circuit. By introducing magnetic coupling between the two resonant inductors, the number of auxiliary switches can be reduced from two to one, and only a single magnetic core is required for the resonant DC link. An analysis of this novel PCQRL topology with coupled inductors is presented to reveal the various soft-switching characteristics. In comparison with the conventional passively clamped, continuously resonant DC link inverter, this soft-switched inverter can reduce voltage stresses from more than 2 per unit (pu) to 1.1-1.3 pu. It can also provide soft-switched pulse-width modulated (PWM) operation. Simulations and experiments are performed to backup the analysis.

FASY: a fuzzy-logic based tool for analog synthesis

Abstract: A CAD tool for analog circuit synthesis is presented. This tool, called FASY, uses fuzzy-logic based reasoning to select one topology among a fixed set of alternatives. For the selected topology, a two-phase optimizer sizes all elements to satisfy the performance constraints minimizing a cost function. In FASY, the decision rules used in the topology selection process are introduced by an expert designer or automatically generated by means of a learning process that uses the optimizer mentioned above. The capability of learning topology selection rules by experience, is unique in FASY. Practical examples demonstrate the tool ability of this tool to learn topology selection rules and to synthesize analog cells with different circuit topologies.

Use of automatically defined functions and architecture-altering operations in automated circuit synthesis with genetic programming

Abstract: This paper demonstrates the usefulness of automatically defined functions and architecture-altering operations in designing analog electrical circuits using genetic programming. A design for a lowpass filter is genetically evolved in which an automatically defined function is profitably reused in the 100% compliant circuit. The symmetric reuse of an evolved substructure directly enhances the performance of the circuit. Genetic programming rediscovered the classical ladder topology used in Butterworth and Chebychev filters as well as the more complex topology used in Cauer (elliptic) filters. A design for a double-passband filter is genetically evolved in which the architecture-altering operations discover a suitable program architecture dynamically during the run. Two automatically defined functions are profitably reused in the genetically evolved 100% complaint circuit.

Paralleling intelligent IGBT power modules with active gate-controlled current balancing

Abstract: Due to tolerances of semiconductors, gate-drive and mechanical parameters, the total load current is not shared equally between paralleled IGBT or intelligent power modules. A closed loop control is presented to balance the current in an almost unlimited number of paralleled modules. The theoretical assumptions have been verified through practical measurements on a n inductive clamped buck converter topology.

On-line training of recurrent neural networks with continuous topology adaptation

Abstract: This paper presents an online procedure for training dynamic neural networks with input-output recurrences whose topology is continuously adjusted to the complexity of the target system dynamics. This is accomplished by changing the number of the elements of the network hidden layer whenever the existing topology cannot capture the dynamics presented by the new data. The training mechanism is based on the suitably altered extended Kalman filter (EKF) algorithm which is simultaneously used for the network parameter adjustment and for its state estimation. The network consists of a single hidden layer with Gaussian radial basis functions (GRBF), and a linear output layer. The choice of the GRBF is induced by the requirements of the online learning. The latter implies the network architecture which permits only local influence of the new data point in order not to forget the previously learned dynamics. The continuous topology adaptation is implemented in our algorithm to avoid memory and computational problems of using a regular grid of GRBF'S which covers the network input space. Furthermore, we show that the resulting parameter increase can be handled "smoothly" without interfering with the already acquired information. If the target system dynamics are changing over time, we show that a suitable forgetting factor can be used to "unlearn" the no longer-relevant dynamics. The quality of the recurrent network training algorithm is demonstrated on the identification of nonlinear dynamic systems.