Showing papers on "Topology (electrical circuits) published in 2007"

Multilevel Voltage-Source-Converter Topologies for Industrial Medium-Voltage Drives

Abstract: This paper presents a technology review of voltage-source-converter topologies for industrial medium-voltage drives. In this highly active area, different converter topologies and circuits have found their application in the market. This paper covers the high-power voltage-source inverter and the most used multilevel-inverter topologies, including the neutral-point-clamped, cascaded H-bridge, and flying-capacitor converters. This paper presents the operating principle of each topology and a review of the most relevant modulation methods, focused mainly on those used by industry. In addition, the latest advances and future trends of the technology are discussed. It is concluded that the topology and modulation-method selection are closely related to each particular application, leaving a space on the market for all the different solutions, depending on their unique features and limitations like power or voltage level, dynamic performance, reliability, costs, and other technical specifications.

A Single-Stage Grid Connected Inverter Topology for Solar PV Systems With Maximum Power Point Tracking

Abstract: This paper proposes a high performance, single-stage inverter topology for grid connected PV systems. The proposed configuration can not only boost the usually low photovoltaic (PV) array voltage, but can also convert the solar dc power into high quality ac power for feeding into the grid, while tracking the maximum power from the PV array. Total harmonic distortion of the current, fed into the grid, is restricted as per the IEEE-519 standard. The proposed topology has several desirable features such as better utilization of the PV array, higher efficiency, low cost and compact size. Further, due to the very nature of the proposed topology, the PV array appears as a floating source to the grid, thereby enhancing the overall safety of the system. A survey of the existing topologies, suitable for single-stage, grid connected PV applications, is carried out and a detailed comparison with the proposed topology is presented. A complete steady-state analysis, including the design procedure and expressions for peak device stresses, is included. Necessary condition on the modulation index "M" for sinusoidal pulsewidth modulated control of the proposed inverter topology has also been derived for discontinuous conduction mode operation. All the analytical, simulation and experimental results are presented.

Topology Study of Photovoltaic Interface for Maximum Power Point Tracking

Abstract: This paper looks at the performance of photovoltaic modules in nonideal conditions and proposes topologies to minimize the degradation of performance caused by these conditions. It is found that the peak power point of a module is significantly decreased due to only the slightest shading of the module, and that this effect is propagated through other nonshaded modules connected in series with the shaded one. Based on this result, two topologies for parallel module connections have been outlined. In addition, dc/dc converter technologies, which are necessary to the design, are compared by way of their dynamic models, frequency characteristics, and component cost. Out of this comparison, a recommendation has been made

Robustness can evolve gradually in complex regulatory gene networks with varying topology.

Abstract: The topology of cellular circuits (the who-interacts-with-whom) is key to understand their robustness to both mutations and noise. The reason is that many biochemical parameters driving circuit behavior vary extensively and are thus not fine-tuned. Existing work in this area asks to what extent the function of any one given circuit is robust. But is high robustness truly remarkable, or would it be expected for many circuits of similar topology? And how can high robustness come about through gradual Darwinian evolution that changes circuit topology gradually, one interaction at a time? We here ask these questions for a model of transcriptional regulation networks, in which we explore millions of different network topologies. Robustness to mutations and noise are correlated in these networks. They show a skewed distribution, with a very small number of networks being vastly more robust than the rest. All networks that attain a given gene expression state can be organized into a graph whose nodes are networks that differ in their topology. Remarkably, this graph is connected and can be easily traversed by gradual changes of network topologies. Thus, robustness is an evolvable property. This connectedness and evolvability of robust networks may be a general organizational principle of biological networks. In addition, it exists also for RNA and protein structures, and may thus be a general organizational principle of all biological systems.

Novel Three-Phase AC–AC Sparse Matrix Converters

Abstract: A novel three-phase ac-ac sparse matrix converter having no energy storage elements and employing only 15 IGBTs, as opposed to 18 IGBTs of a functionally equivalent conventional ac-ac matrix converter, is proposed. It is shown that the realization effort could be further reduced to only nine IGBTs in an ultra sparse matrix converter (USMC) in the case where only unidirectional power flow is required and the fundamental phase displacement at the input and at the output is limited to plusmnpi/6. The dependency of the voltage and current transfer ratios of the sparse matrix converters on the operating parameters is analyzed and a space vector modulation scheme is described in combination with a zero current commutation method. Finally, the sparse matrix concept is verified by simulation and experimentally using a 6.8-kW/400-V very sparse matrix converter, which is implemented with 12 IGBT switches, and USMC prototypes.

Soft Switching Circuit for Interleaved Boost Converters

Abstract: A zero-voltage switching-zero-current switching interleaved boost converter is proposed in this paper. An active circuit branch in parallel with the main switches is added and it is composed of an auxiliary switch and a snubber capacitor. By using this interleaved converter topology, zero current turn-on and zero voltage turn-off of the main switches can be achieved and the reverse-recovery loss of boost diode can be reduced. In addition, the auxiliary switches are zero-voltage transmission during the whole switching transition. A prototype of boost converter rated at 1.2kW has been built to confirm the effectiveness of the converter

Large-scale topology optimization using preconditioned Krylov subspace methods with recycling

Abstract: SUMMARY The computational bottleneck of topology optimization is the solution of a large number of linear systems arising in the finite element analysis. We propose fast iterative solvers for large threedimensional topology optimization problems to address this problem. Since the linear systems in the sequence of optimization steps change slowly from one step to the next, we can significantly reduce the number of iterations and the runtime of the linear solver by recycling selected search spaces from previous linear systems. In addition, we introduce a MINRES (Minimum Residual method) version with recycling (and a short term recurrence) to make recycling more efficient for symmetric problems. Furthermore, we discuss preconditioning to ensure fast convergence. We show that a proper rescaling of the linear systems reduces the huge condition numbers that typically occur in topology optimization to roughly those arising for a problem with constant density. We demonstrate the effectiveness of our solvers by solving a topology optimization problem with more than a million unknowns on a fast PC.

Eliminating ground current in a transformerless photovoltaic application

Abstract: A single phase converter can be used for low-power grid connected applications. In photovoltaic applications it is possible to remove the transformer in the inverter in order to reduce losses, costs and size. Galvanic connection of the grid and the DC sources in transformerless systems can introduce additional leakage currents because of the earth parasitic capacitance. This currents increase conducted and radiated electromagnetic emissions, harmonics injected in the utility grid and system losses. Amplitude and spectrum of ground current depends on the converter topology, on the switching strategy and on the resonant circuit formed by the ground capacitance, the converter, the AC filter and the grid. In this paper, the leakage current in a 1.5 kW photovoltaic installation is measured. The installation includes a string of sixteen panels, a full bridge inverter and a LCL filter. Influence of inverter topology and modulation strategy on the magnitude of the leakage current is presented. Finally, the use of neutral point clamped inverters in transformerless photovoltaic applications is studied.

Bridgeless Boost Rectifier With Low Conduction Losses and Reduced Diode Reverse-Recovery Problems

Abstract: A bridgeless boost rectifier with low conduction losses and reduced diode reverse-recovery problems is proposed for power-factor correction. The proposed boost rectifier can reduce the conduction losses and alleviate the diode reverse-recovery problems by using a coupled inductor and two additional diodes. Zero-current turn-off of the output diodes is achieved, and the reverse-recovery currents of the additional diodes are slowed down to reduce the diode reverse-recovery losses. All inductive components are realized on a single magnetic core by utilizing the leakage inductance of the coupled inductor. Furthermore, for the use of this topology in the practical design, the linear peak current mode control is employed for the proposed boost rectifier. A detailed analysis and a control strategy are presented. Experimental results for a 300-W prototype are also discussed to show the performance of the proposed boost rectifier

Multi-Topology (MT) Routing in OSPF

Abstract: This draft describes an extension to OSPF in order to define independent IP topologies called Multi-Topologies (MTs). The MT extension can be used for computing different paths for unicast traffic, multicast traffic, different classes of service based on flexible criteria, or an in-band network management topology. [M-ISIS] describes a similar mechanism for ISIS. An optional extension to exclude selected links from the default topology is also described.

A Complete Harmonic Elimination Approach to DC Link Voltage Balancing for a Cascaded Multilevel Rectifier

Abstract: This paper presents a complete method that is used to balance dc link voltages in a cascaded H-Bridge (CHB) multilevel rectifier. Recently, such converters have been the subject of extensive research due to their suitability for high-power applications. One requirement in using a multilevel active rectifier at high levels of power is to limit the switching losses by reducing the switching frequency to a minimum. Another requirement for these converters is to ensure that individual dc link capacitor voltages for each cell of the converter are always balanced to ensure controllability and to limit stress on the converter cells. This paper presents a complete method in solving both of these problems using a selective-harmonic-elimination pulsewidth-modulation scheme. The scheme utilizes a simple controller to track each cell dc link capacitor voltage magnitude and accordingly biases the power flowing into each cell to ensure that the voltages across each cell capacitor converge. This is the case even when the loads attached to the individual cells are not balanced. The theory is supported by both simulated results from Saber and by experimental results from a seven-level CHB single-phase multilevel rectifier.

Topology identification of weighted complex dynamical networks

Abstract: Recently, various papers investigated the geometry features, synchronization and control of complex network provided with certain topology. While, the exact topology of a network is sometimes unknown or uncertain. Using Lyapunov theory, we propose an adaptive feedback controlling method to identify the exact topology of a rather general weighted complex dynamical network model. By receiving the network nodes evolution, the topology of such kind of network with identical or different nodes, or even with switching topology can be monitored. Experiments show that the methods presented in this paper are of high accuracy with good performance.

Robust on-line computation of Reeb graphs

Abstract: Reeb graphs are a fundamental data structure for understanding and representing the topology of shapes. They are used in computer graphics, solid modeling, and visualization for applications rangin...

Theoretical analysis and optimal design of LLC resonant converter

Abstract: A LLC resonant topology is analyzed to derive efficiency and cost optimal design for wide input ranges and load variations In the LLC converter, a wide range of output power is controlled with only a narrow variation in operating frequency since this converter is capable of both step-up and step-down In addition, ZVS turn-on and ZCS turn-off of MOSFETs and diode rectifiers can be achieved over the entire operating range Finally, the inductance of a resonant tank in the primary side can be merged in the main power transformer by resonant inductance and the absence of the secondary filter inductor makes low voltage stress on secondary rectifier and cost-effective property DC characteristics and input-output response in frequency domain are obtained with the equivalent circuit derived by first harmonic approximation (FHA) method In addition, operational principles are explained to show the ZVS and ZCS conditions of primary switches and output diode rectifiers, respectively Efficiency and cost optimal design rules of the LLC resonant converter are derived by a primary resonant network, operating frequency, and dead time duration Proposed analysis and designation are proved by experimental results with a 400 W LLC resonant converter

A High-Frequency Resonant Inverter Topology with Low Voltage Stress

Abstract: This document presents a new switched-mode resonant inverter, which we term the Phi2 inverter, that is well suited to operation at very high frequencies and to rapid on/off control. Features of this inverter topology include low semiconductor voltage stress, small passive energy storage requirements, fast dynamic response, and good design flexibility. The structure and operation of the proposed topology are described, and a design procedure is introduced. Experimental results demonstrating the new topology are also presented. A prototype Phi2 inverter is described that switches at 30 MHz and provides over 500 W of rf power at a drain efficiency above 92%. It is expected that the Phi2 inverter will find use as a building block in high performance dc-dc converters among other applications [1], [2].

Leakage current evaluation of a singlephase transformerless PV inverter connected to the grid

Abstract: For low-power grid connected applications a single phase converter can be used. In PV applications it is possible to remove the transformer in the inverter in order to reduce losses, costs and size. Galvanic connection of the grid and the DC sources in transformerless systems can introduce additional leakage currents due to the earth parasitic capacitance. This currents increase conducted and radiated electromagnetic emissions, harmonics injected in the utility grid and losses. Amplitude and spectrum of leakage current depends on the converter topology, on the switching strategy and on the resonant circuit formed by the ground capacitance, the converter, the AC filter and the grid. In this paper, the leakage current in a 1.5 kW PV installation is measured under different conditions and used to build simulation model. The installation includes a string of sixteen PV panel, a full bridge inverter and a LCL filter. This model allows studying the influence of the harmonics injected by the inverter on the leakage current.

Synthesis of Tapped-Inductor Switched-Mode Converters

Abstract: A classification scheme is used to categorize tapped-inductor switched-mode power supplies. This new scheme allows the many possible circuit variants to be displayed in a logical manner and analyzed for practicality and performance. The scheme offers a way of ensuring that no tapped inductor converter circuit is neglected when a tapped-inductor circuit is to be chosen for any particular application.

Structure, scaling, and phase transition in the optimal transport network.

Abstract: The structure and properties of optimal networks depend on the cost functional being minimized and on constraints to which the minimization is subject. We show here two different formulations that lead to identical results: minimizing the dissipation rate of an electrical network under a global constraint is equivalent to the minimization of a power-law cost function introduced by Banavar et al. [Phys. Rev. Lett. 84, 4745 (2000)10.1103/PhysRevLett.84.4745]. An explicit scaling relation between the currents and the corresponding conductances is derived, proving the potential flow nature of the latter. Varying a unique parameter, the topology of the optimized networks shows a transition from a tree topology to a very redundant structure with loops; the transition corresponds to a discontinuity in the slope of the power dissipation.

Non-Isolated Bus Converters with Voltage Divider Topology

Abstract: A voltage converter having four switches Q1, Q2, Q3, Q4, connected in series and operated in pairs in a complementary fashion. An input voltage is provided across the four switches. A middle capacitor is connected in parallel with two middle switches Q2, Q3. Voltage output is provided across switches Q3 and Q4 (i.e. at a midpoint of the four switches). Series-connected output capacitors can be connected in parallel with the set of four switches. The middle capacitor alone or in combination with parallel connected capacitors, when connected to the input voltage or output terminals functions as a capacitive voltage divider for voltage conversion and/or regulation with extremely high efficiency and which can provide either step-down or step-up function. Also, an output inductor can be provided as a perfecting feature to further increase efficiency. Alternatively, two of the four switches can be replaced with rectifying diodes. Alternatively, the voltage converter has two or more sets of four switches connected in parallel. The two sets can be connected by resistor-capacitor ladder, or an inductor-capacitor ladder for charge/voltage sharing to reduce voltage ripple.

Very High Frequency Resonant Boost Converters

Abstract: This document presents a resonant boost topology suitable for very high frequency (VHF, 30-300 MHz) dc-dc power conversion. The proposed design features low device stress, high efficiency over a wide load range, and excellent transient performance. Two experimental prototypes have been built and evaluated. One is a 110 MHz, 23 W converter which uses a high performance rf LDMOSFET. The converter achieves higher than 87% efficiency at nominal input and output voltages, and maintains good efficiency down to 5% of full load. The second implementation, aimed towards integration, is a 50 MHz 17 W converter which uses a transistor from a 50 V integrated power process. In addition, two resonant gate drive schemes suitable for VHF operation are presented, both of which provide rapid startup and low-loss operation. Both converters regulate the output using high-bandwidth on-off hysteretic control, which enables fast transient response and efficient light-load operation. The low energy storage requirements of the converters allow the use of coreless inductors in both designs, thereby eliminating magnetic core loss and introducing the possibility of easy integration.

A novel nine-switch PWM rectifier-inverter topology for three-phase UPS applications

Abstract: A novel three-phase PWM rectifier-inverter topology for UPS applications is proposed in this paper. The topology uses only nine IGBT devices for AC/AC conversion through a quasi DC link circuit. This converter topology features sinusoidal inputs and outputs, unity input power factor, and more importantly, low manufacturing cost. The operating principle of the converter is elaborated and a novel modulation scheme is presented. The performance of the proposed converter is verified by experiments on a 5 kVA prototyping UPS system.

A novel voltage-clamped CMOS ISFET sensor interface

Abstract: This paper presents a novel interface for ion-sensitive field effect transistors (ISFET) in which operation at a fixed electrical bias is achieved by voltage clamping. The chosen topology provides pH-dependent current and voltage output signals to drive an appropriate output stage. The circuit can be operated in either strong or weak inversion, depending on the requirements of the application with a pseudo-differential ISFET-REFET topology to allow use of an on-chip reference electrode. Simulation results are shown herein for single-ended and differential implementations. For a single-ended front-end with 1nA bias current, the strong inversion implementation at 2.5V supply has a power consumption of 0.185mW at pH 7 and the weak inversion implementation at 1.5V supply has a power consumption of 13nW at pH 7. The circuit and ISFET-REFET pair have been fabricated in the UMC 0.25mum CMOS technology.

Detecting Black Hole Attacks in Tactical MANETs using Topology Graphs

Abstract: Black hole attacks are a serious threat to communication in tactical MANETs. In this work we present TOGBAD a new centralised approach, using topology graphs to identify nodes attempting to create a black hole. We use well-established techniques to gain knowledge about the network topology and use this knowledge to perform plausibility checks of the routing information propagated by the nodes in the network. We consider a node generating fake routing information as malicious. Therefore, we trigger an alarm if the plausibility check fails. Furthermore, we present promising first simulation results. With our new approach, it is possible to already detect the attempt to create a black hole before the actual impact occurs.

Design Procedures for Three-Stage CMOS OTAs With Nested-Miller Compensation

Abstract: Design procedures for three-stage CMOS operational transconductance amplifiers employing nested-Miller frequency compensation are presented in this paper. After describing the basic methodology on a Class-A topology, some modifications, to increase swing, slew-rate and current drive capability, are subsequently discussed for a Class-AB solution. The approaches developed are simple as they do not introduce unnecessary circuit constraints and yield accurate results. They are hence suited for a pencil-and-paper design, but can be easily integrated into an analog knowledge-based computer-aided design tool. Experimental prototypes, designed in a 0.35-mum technology by following the proposed procedures, were fabricated and tested. Measurement results were found in close agreement with the target specifications

Constant current light emitting diode (LED) driver circuit and method

Abstract: A drive circuit supplies a drive current to a plurality of light emitting diodes The drive circuit includes a voltage converter circuit having a particular topology and including at least one inductive element and at least one switching element The drive circuit senses a current through one of the inductive and switching elements and generates a feedback signal from the sensed current The feedback signal has a value indicating the drive current being supplied to the light emitting diodes and the drive circuit controls the operation of the voltage converter responsive to the feedback signal

Active Microwave Circuit With Negative Group Delay

Abstract: In this letter, we report on the design, simulation and implementation of an active negative group delay circuit that operates at 1 GHz with a group delay and a gain, respectively, around 2 ns and 2 dB. Analytical formulas are proposed to demonstrate that the adopted topology is able to simultaneously achieve negative group delay (NGD) and gain while fulfilling active device constraints. The theoretical and simulated results are both validated by frequency measurements of a two-stage active microwave circuit.

VSC Based D-STATCOM with Selective Harmonic Elimination

Abstract: This paper describes the design, implementation, and performance of a medium-size distribution-type static synchronous compensator (D-STATCOM) with the simplest two-level three-leg voltage-source converter (VSC) topology. Reactive-power control is achieved by phase-shift-angle control, and VSC harmonics are eliminated by selective harmonic elimination method (SHEM). VSC has been designed at the highest low-voltage level of 1 kV and connected to a medium-voltage (MV) bus through a low-pass input filter and Delta/Y-connected MV/1-kV coupling transformer. At the MV side of D-STATCOM, line-current harmonics are minimized to comply with the IEEE Std. 519-1992 for the weakest supply conditions by applying 8-angle TLN2 elimination technique. This necessitates switching the water-cooled high-voltage insulated-gate bipolar transistor (HV-IGBT) modules at 850 Hz, thus eliminating 5th, 7th, 11th, 13th, 17th, 19th, 23rd, and 25th voltage harmonics at the input of VSC. By carefully designing the laminated bus system and selecting minimum stray-inductance dc-link capacitors directly mountable on the laminated bus, stray inductance of the commutation path is brought to a nearly absolute minimum of 60 nH, thus maximizing the utilization of wire-bond single-side cooled HV IGBTs and eliminating the need for resistor-capacitor-diode (RCD) clamping snubbers. The performance of SHEM, together with the phase-shift-angle control, has been tested in the field on a 0-1780-kVAr capacitive 6.3-kV VSC-based D-STATCOM (-750/+900 kVAr VSC) prototype. Field-test results show that SHEM, together with phase-shift-angle control, leads to optimum switching frequency and device utilization for HV IGBTs and high system performance at the expense of slower response as compared to the other known control techniques.