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Showing papers on "Topology (electrical circuits) published in 2008"


Proceedings ArticleDOI
15 Jun 2008
TL;DR: In this article, a novel concept of high voltage direct current converter (HVDC) employing the modular multilevel converter (M2C) is presented employing the M2C.
Abstract: In this paper a novel concept of high voltage direct current converter (HVDC) is presented employing the modular multilevel converter (M2C). Converters using IGBT-power devices, are getting increased importance in order to meet the global needs for reliable and environment friendly power supply and distribution. The new topology is compared to HVDC-transmission based on two level (2level) converters with direct series connected IGBT- devices or known multilevel converters. Main design aspects, concerning the rating of the power devices, the power losses and achievable efficiencies are investigated. For this purpose, a new computation method is presented and applied. This enables clear insight into the influence of various design parameters in a generalized form. Additionally, the characteristics and the differences of the topologies, with respect to passive filters, the necessary pulse frequencies and the arm currents are examined. As an example of the results, a comparison of the semiconductor losses and the efficiencies of the different topologies are given.

800 citations


Journal ArticleDOI
Feng Xiao1, Long Wang1
TL;DR: In this paper, a distributed consensus algorithm for continuous-time multi-agent systems with discontinuous information transmission is proposed, where the consensus control strategy is implemented based on the state information of each agent's neighbors at some discrete times.
Abstract: The paper studies asynchronous consensus problems of continuous-time multi-agent systems with discontinuous information transmission. The proposed consensus control strategy is implemented based on the state information of each agent's neighbors at some discrete times. The asynchrony means that each agent's update times, at which the agent adjusts its dynamics, are independent of others'. Furthermore, it is assumed that the communication topology among agents is time-dependent and the information transmission is with bounded time-varying delays. If the union of the communication topology across any time interval with some given length contains a spanning tree, the consensus problem is shown to be solvable. The analysis tool developed in this paper is based on nonnegative matrix theory and graph theory. The main contribution of this paper is to provide a valid distributed consensus algorithm that overcomes the difficulties caused by unreliable communication channels, such as intermittent information transmission, switching communication topology, and time-varying communication delays, and therefore has its obvious practical applications. Simulation examples are provided to demonstrate the effectiveness of the theoretical results.

688 citations


Journal ArticleDOI
TL;DR: A new multilevel converter topology that has many steps with fewer power electronic switches results in reduction of the number of switches, losses, installation area, and converter cost.
Abstract: This paper introduces a new multilevel converter topology that has many steps with fewer power electronic switches. The proposed circuit consists of series-connected submultilevel converters blocks. The optimal structures of this topology are investigated for various objectives, such as minimum number of switches and capacitors, and minimum standing voltage on switches for producing maximum output voltage steps. A new algorithm for determination of dc voltage sourcespsila magnitudes has also been presented. The proposed topology results in reduction of the number of switches, losses, installation area, and converter cost. The operation and performance of the proposed multilevel converter has been verified by the simulation and experimental results of a single-phase 53-level multilevel converter.

645 citations


Proceedings ArticleDOI
18 Nov 2008
TL;DR: In this paper, the theory behind the proposed balancing methods for battery systems within the past twenty years is presented and comparison between the methods is carried out and different balancing methods are grouped by their nature of balancing.
Abstract: The trend toward more electric vehicles has demanded the need for high voltage, high efficiency and long life battery systems. A complete battery system consists of the following parts: protection, management and balancing. Of the three parts, balancing is the most important concerning the life of the battery system because without the balancing system, the individual cell voltages will drift apart over time. The capacity of the total pack will also decrease more quickly during operation which will result in the fail of the total battery system. This condition is especially severe when the battery has a long string of cells (high voltage battery systems) and frequent regenerative braking (charging) is done via the battery pack. This paper presents the theory behind the proposed balancing methods for battery systems within the past twenty years. Comparison between the methods is carried out and different balancing methods are grouped by their nature of balancing.

627 citations


01 Jan 2008
TL;DR: The main contribution of this paper is to provide a valid distributed consensus algorithm that overcomes the difficulties caused by unreliable communication channels, such as intermittent information transmission, switching communication topology, and time-varying communication delays, and therefore has its obvious practical applications.
Abstract: The paper studies asynchronous consensus problems of continuous-time multi-agent systems with discontinuous infor- mation transmission. The proposed consensus control strategy is implemented based on the state information of each agent's neighbors at some discrete times. The asynchrony means that each agent's update times, at which the agent adjusts its dynamics, are independent of others'. Furthermore, it is assumed that the communication topology among agents is time-dependent and the information transmission is with bounded time-varying delays. If the union of the communication topology across any time interval with some given length contains a spanning tree, the consensus problem is shown to be solvable. The analysis tool developed in this paper is based on nonnegative matrix theory and graph theory. The main contribution of this paper is to provide a valid distributed consensus algorithm that overcomes the difficulties caused by unreliable communication channels, such as intermit- tent information transmission, switching communication topology, and time-varying communication delays, and therefore has its obvious practical applications. Simulation examples are provided to demonstrate the effectiveness of the theoretical results.

607 citations


Journal ArticleDOI
TL;DR: This paper analyzes the design of the passive components and gives a practical and low-cost solution for the minimization of the circulation currents between the inverters, by using common-mode coils.
Abstract: In this paper, an interleaved active-power-filter concept with reduced size of passive components is discussed. The topology is composed of two pulsewidth-modulation interleaved voltage-source inverters connected together on the ac line and sharing the same dc-link capacitor. The advantages of the proposed approach are as follows: 1. significant reduction in the linkage inductors' size by decreasing the line-current ripple due to the interleaving; 2. reduction of the switching stress in the dc-link capacitor, due to the shared connection; and 3. more accurate compensation for high-power applications, because the power sharing allows one to use a higher switching frequency in each inverter. This paper analyzes the design of the passive components and gives a practical and low-cost solution for the minimization of the circulation currents between the inverters, by using common-mode coils. Several simulation results are discussed, and experimental results with a three-phase 10-kVA 400-V unit are obtained to validate the theoretical analysis.

364 citations


Journal ArticleDOI
TL;DR: In this paper, the average consensus problem in directed networks of agents with both switching topology and time-delay is studied and the stability analysis is performed based on a proposed Lyapunov-Krasovskii function.
Abstract: This paper is devoted to the study of the average-consensus problem in directed networks of agents with both switching topology and time-delay. The stability analysis is performed based on a proposed Lyapunov–Krasovskii function. Sufficient conditions in terms of linear matrix inequalities (LMIs) are given to guarantee the average consensus under arbitrary switching of the network topology even if the time-delay is time-varying. Numerical simulations show the effectiveness of our theoretical results.

354 citations


Journal ArticleDOI
TL;DR: The measured conversion efficiency for the prototype circuit, implemented in a 130-nm CMOS technology, shows more than a 15% efficiency improvement over a linear converter for low output voltages rising to a peak efficiency of 77.9 % for a 0.9 V output.
Abstract: Historically, buck converters have relied on high-Q inductors on the order of 1 to 100 muH to achieve a high efficiency. Unfortunately, on-chip inductors are physically large and have poor series resistances, which result in low-efficiency converters. To mitigate this problem, on-chip magnetic coupling is exploited in the proposed stacked interleaved topology to enable the use of small (2 nH) on-chip inductors in a high-efficiency buck converter. The dramatic decrease in the inductance value is made possible by the unique bridge timing of the stacked design that causes magnetic coupling to boost the converter's efficiency by reducing the current ripple in each inductor. The magnetic coupling is realized by stacking the two inductors on top of one another, which not only lowers the required inductance, but also reduces the chip area consumed by the two inductors. The measured conversion efficiency for the prototype circuit, implemented in a 130-nm CMOS technology, shows more than a 15% efficiency improvement over a linear converter for low output voltages rising to a peak efficiency of 77.9 % for a 0.9 V output. These efficiencies are comparable to converters implemented with higher Q inductors, validating that the proposed techniques enable high-efficiency converters to be realized with small on-chip inductors.

288 citations


Journal ArticleDOI
TL;DR: Simulations demonstrate that the optimal design with random link failures, link communication costs, and a communication cost constraint is a constrained convex optimization problem that can be efficiently solved for large networks by semidefinite programming techniques.
Abstract: In a sensor network, in practice, the communication among sensors is subject to: 1) errors that can cause failures of links among sensors at random times; 2) costs; and 3) constraints, such as power, data rate, or communication, since sensors and networks operate under scarce resources. The paper studies the problem of designing the topology, i.e., assigning the probabilities of reliable communication among sensors (or of link failures) to maximize the rate of convergence of average consensus, when the link communication costs are taken into account, and there is an overall communication budget constraint. We model the network as a Bernoulli random topology and establish necessary and sufficient conditions for mean square sense (mss) and almost sure (a.s.) convergence of average consensus when network links fail. In particular, a necessary and sufficient condition is for the algebraic connectivity of the mean graph topology to be strictly positive. With these results, we show that the topology design with random link failures, link communication costs, and a communication cost constraint is a constrained convex optimization problem that can be efficiently solved for large networks by semidefinite programming techniques. Simulations demonstrate that the optimal design improves significantly the convergence speed of the consensus algorithm and can achieve the performance of a non-random network at a fraction of the communication cost.

270 citations


Proceedings ArticleDOI
01 Jan 2008

269 citations


Journal ArticleDOI
TL;DR: The main result is that if the adjacent topology of the graph is frequently connected then the consensus is achievable via local-information-based decentralized controls, provided that the linear dynamic mode is completely controllable.
Abstract: In this paper the consensus problem is considered for multi-agent systems, in which all agents have an identical linear dynamic mode that can be of any order. The main result is that if the adjacent topology of the graph is frequently connected then the consensus is achievable via local-information-based decentralized controls, provided that the linear dynamic mode is completely controllable. Consequently, many existing results become particular cases of this general result. In this paper, the case of fixed connected topology is discussed first. Then the case of switching connected topology is considered. Finally, the general case is studied where the graph topology is switching and only connected often enough. Copyright © 2008 John Wiley and Sons Asia Pte Ltd and Chinese Automatic Control Society

Journal ArticleDOI
TL;DR: This paper provides a comprehensive review of the state of the art of high-power converters (above 1 MW) for adjustable-speed ac drives and provides the latest technological advances and future trends in CSI- and CCV-fed large drives.
Abstract: This paper, along with an earlier published paper as Part 1, provides a comprehensive review of the state of the art of high-power converters (above 1 MW) for adjustable-speed ac drives. In this highly active area, different converter topologies have been developed for various drive applications in the industry. Due to its extensive coverage, the subject is divided into two parts: multilevel voltage source and current source converter topologies. This paper is focused on the second part and covers the current source converter technologies, including pulsewidth-modulated current-source inverters (CSIs) and load-commutated inverters. In addition, this paper also addresses the present status of the direct converter, which is also known as cycloconverter (CCV). This paper focuses on the latest CSI and CCV technologies and an overview of the commonly used modulation schemes. It also provides the latest technological advances and future trends in CSI- and CCV-fed large drives. This paper serves as a useful reference for academic researchers and practicing engineers in the field of power converters and adjustable-speed drives.

Journal ArticleDOI
TL;DR: In this paper, a new switched-mode resonant inverter, which is termed the inverter that is well suited to operation at very high frequencies and to rapid on/off control is presented.
Abstract: This paper presents a new switched-mode resonant inverter, which we term the inverter, that is well suited to operation at very high frequencies and to rapid on/off control. Features of this inverter topology include low semiconductor voltage stress, small passive energy storage requirements, fast dynamic response, and good design flexibility. The structure and operation of the proposed topology are described, and a design procedure is introduced. Experimental results demonstrating the new topology are also presented. A prototype inverter is described that switches at 30 MHz and provides over 500 W of radio frequency power at a drain efficiency above 92%. It is expected that the inverter will find use as a building block in high-performance dc-dc converters among other applications.

Journal ArticleDOI
TL;DR: In this paper, a systematic evaluation approach of three-phase pulsewidth-modulated (PWM) AC-AC converter topologies for high-density applications is presented, where all major components and subsystems in a converter are considered and the interdependence of all the constraints and design parameters is systematically studied.
Abstract: This paper presents a systematic evaluation approach of three-phase pulsewidth-modulated (PWM) AC-AC converter topologies for high-density applications. All major components and subsystems in a converter are considered and the interdependence of all the constraints and design parameters is systematically studied. The key design parameters, including switching frequency, modulation scheme, and passive values, are selected by considering their impacts on loss, harmonics, electromagnetic interference (EMI), control dynamics and stability, and protection. The component selection criteria as well as the physical design procedures are developed from the high-density standpoint. The concept of using the same inductor for harmonic suppression and EMI filtering is introduced in the design. With the proposed methodology, four converter topologies, a back-to-back voltage source converter (BTB-VSC), a nonregenerative three-level boost (Vienna-type) rectifier plus voltage source inverter (NTR-VSI), a back-to-back current source converter (BTB-CSC), and a 12-switch matrix converter, are analyzed and compared for high specific power using SiC devices. The evaluation results show that with the conditions specified in this paper, BTB-VSC and NTR-VSI have considerably lower loss, resulting in higher specific power than BTB-CSC and the matrix converter. The proposed methodology can be applied to other topologies with different comparison metrics and can be a useful tool for high-density topology selection.

Journal ArticleDOI
TL;DR: In this paper, the authors studied the possibility of minimizing common mode (CM) noise emission in bridgeless power factor correction (PFC) converters and proposed two approaches to achieve symmetry.
Abstract: The goal of this paper is to study the possibility of minimizing common mode (CM) noise emission in bridgeless power factor correction (PFC) converters. Two approaches are proposed. In the first approach, the bridgeless PFC is modified to achieve symmetry. A CM noise model for symmetric topology is derived and the conditions for symmetry are summarized. Parasitics critical to the symmetrical condition are studied and carefully controlled. As a result, CM noise can be minimized with good cancellation. The second approach is to introduce a balance technique to bridgeless PFC converters. The topology is modified so that the balance technique can be applied so as to minimize CM noise. Experimental results validate that both approaches can greatly reduce CM noise up to 30 dBmuV. The two approaches are compared in terms of both its effects on CM noise and their implementations.

Journal ArticleDOI
TL;DR: This paper presents a new topology of uninterruptible power supply (UPS) by using a Z-source inverter, where a symmetrical LC network is employed to couple the main power circuit of an inverter to a battery bank.
Abstract: This paper presents a new topology of uninterruptible power supply (UPS) by using a Z-source inverter, where a symmetrical LC network is employed to couple the main power circuit of an inverter to a battery bank. With this new topology, the proposed UPS can maintain the desired ac output voltage at the significant voltage drop of the battery bank with high efficiency, low harmonics, fast response, and good steady-state performance in comparison with traditional UPSs. The simulation and experimental results of a 3-kW UPS with the new topology confirm its validity.

Proceedings ArticleDOI
07 Jan 2008
TL;DR: A measure of "electrical centrality" for AC power networks is derived, which describes the structure of the network as a function of its electrical topology rather than its physical topology, and finds that power networks have a number of highly-connected "hub" buses.
Abstract: We derive a measure of "electrical centrality" for AC power networks, which describes the structure of the network as a function of its electrical topology rather than its physical topology. We compare our centrality measure to conventional measures of network structure using the IEEE 300-bus network. We find that when measured electrically, power networks appear to have a scale-free network structure. Thus, unlike previous studies of the structure of power grids, we find that power networks have a number of highly-connected "hub" buses. This result, and the structure of power networks in general, is likely to have important implications for the reliability and security of power networks.

Journal ArticleDOI
TL;DR: In this paper, three PI-based solutions are discussed, and the tuning of the best solution is addressed in case resonant controllers are used instead of classical integrators, and practical problems such as the implementation and the influence of phase-locked-loop systems and analog filters on the measurements are discussed.
Abstract: The H-bridge-based multilevel active rectifier is an attractive topology that allows feeding of multiple dc loads. The main control problem is to manage state variables (one current plus dc voltages) with only switching functions. In this paper, three PI-based solutions are discussed, and the tuning of the best solution is addressed in case resonant controllers are used instead of classical integrators. Moreover, practical problems such as the implementation and the influence of phase-locked-loop systems and of analog filters (first order and Butterworth) on the measurements are discussed.

Journal ArticleDOI
01 Nov 2008
TL;DR: It is shown that the idea of controlling this converter topology with a predictive approach can be implemented simply and input currents with unity power factor and a total harmonic distortion lower than 5% can be obtained.
Abstract: This paper presents the implementation of a predictive control scheme for an indirect matrix converter. The control scheme selects the switching state that minimizes the reactive power and the error in the output currents according to their reference values. This is accomplished by using a prediction horizon of one sample time and a very intuitive control law. Experimental results with a 6.8-kVA indirect matrix converter prototype are provided in order to validate the proposed control scheme. The converter uses standard digital signal processor operating at a sampling frequency of 20 mus. It is shown that the idea of controlling this converter topology with a predictive approach can be implemented simply and input currents with unity power factor and a total harmonic distortion lower than 5% can be obtained.

Journal ArticleDOI
TL;DR: This work focuses on networks whose connections are sparse and where data are limited, and constrained optimization techniques based on the L1 vector norm are found to be superior for inference of the network connections.
Abstract: Given a general physical network and measurements of node dynamics, methods are proposed for reconstructing the network topology. We focus on networks whose connections are sparse and where data are limited. Under these conditions, common in many biological networks, constrained optimization techniques based on the L1 vector norm are found to be superior for inference of the network connections.

Journal ArticleDOI
Xiaoqun Wu1
TL;DR: In this paper, an adaptive feedback technique is proposed to identify the exact topology of a weighted general complex dynamical network model with time-varying coupling delay by receiving the network nodes evolution.
Abstract: Many existing papers investigated the geometric features, control and synchronization of complex dynamical networks provided with certain topology. However, the exact topology of a network is sometimes unknown or uncertain. Based on LaSalle’s invariance principle, we propose an adaptive feedback technique to identify the exact topology of a weighted general complex dynamical network model with time-varying coupling delay. By receiving the network nodes evolution, the topology of such a kind of network with identical or different nodes, or even with varying topology can be monitored. In comparison with previous methods, time delay is taken into account in this simple, analytical and systematic synchronization-based technique. Particularly, the weight configuration matrix is not necessarily symmetric or irreducible, and the inner-coupling matrix need not be symmetric. Illustrative simulations are provided to verify the correctness and effectiveness of the proposed scheme.

Journal ArticleDOI
TL;DR: The main objective of this survey is to familiarize the reader with research on network topology over the past decade, and study techniques for inference, modeling, and generation of the Internet topology at both the router and administrative levels.
Abstract: Accurate measurement, inference and modeling techniques are fundamental to Internet topology research. Spatial analysis of the Internet is needed to develop network planning, optimal routing algorithms, and failure detection measures. A first step toward achieving such goals is the availability of network topologies at different levels of granularity, facilitating realistic simulations of new Internet systems. The main objective of this survey is to familiarize the reader with research on network topology over the past decade. We study techniques for inference, modeling, and generation of the Internet topology at both the router and administrative levels. We also compare the mathematical models assigned to various topologies and the generation tools based on them. We conclude with a look at emerging areas of research and potential future research directions.

Journal ArticleDOI
TL;DR: In this article, the performance attributes of the open-slot, modular-wound, external-rotor, topology of electrical machine were discussed for which the winding factor is maximal and torque ripple is minimal.
Abstract: This paper discusses the performance attributes of the open-slot, modular-wound, external-rotor, topology of electrical machine. Combinations of pole and slot numbers are presented for which the winding factor is maximal and torque ripple is minimal. An optimization of the magnetic circuit design of six promising pole-slot configurations is undertaken using a parametric finite element model (FEM) combined with a genetic algorithm (GA). These designs are benchmarked against a conventional 1.5 slots/pole external-rotor brushless dc machine. These candidate electrical machine versions are characterized by having the same external-rotor diameter, total slot area available for the winding and by equal volumes of permanent magnet (PM). Based on the analysis, the most promising motor structure was selected and a prototype wheel-hub motor has been built for application in a small electrical vehicle. Test data from the prototype is used to validate the findings of the initial analyses and practically demonstrate the attributes of the topology.

Journal ArticleDOI
TL;DR: In this paper, the authors present a modular, fault tolerant dc-dc converter topology that utilizes common duty ratio control to ensure equal sharing of input voltage and output current in input-series output-parallel configuration.
Abstract: This paper presents a modular, fault tolerant dc-dc converter topology that utilizes common duty ratio control to ensure equal sharing of input voltage and output current in input-series output-parallel configuration. The input-series connection allows the use of low voltage MOSFET's optimized for very low RDS,ON resulting in lower conduction losses. The common-duty-ratio scheme does not require a dedicated control loop for input voltage or output current sharing. The fault tolerant protection and control scheme accommodates failure of one or more modules, and ensures input voltage and load current sharing among the remaining healthy modules. The design of a new sensing scheme for detection of fault is presented. The analysis of the topology and the underlying principles are presented. The dependence of peak current from the source and in the protection switch in case of failure of a single converter has been analyzed and the various design tradeoff issues are discussed. The theoretical predictions are validated with simulation and experimental results. The proposed method is simple and gives good dynamic response to changes in input, load, and during fault. This topology is especially suited for space applications where a high level of fault tolerance can be achieved through designed redundancy.

Proceedings Article
01 Jan 2008
TL;DR: In this article, a stacked interleaved topology is proposed to enable the use of small (2 nH) on-chip inductors in a high-efficiency buck converter.
Abstract: Historically, buck converters have relied on high-Q inductors on the order of 1 to 100 μH to achieve a high efficiency. Unfortunately, on-chip inductors are physically large and have poor series resistances, which result in low-efficiency converters. To mitigate this problem, on-chip magnetic coupling is exploited in the proposed stacked interleaved topology to enable the use of small (2 nH) on-chip inductors in a high-efficiency buck converter. The dramatic decrease in the inductance value is made possible by the unique bridge timing of the stacked design that causes magnetic coupling to boost the converter's efficiency by reducing the current ripple in each inductor. The magnetic coupling is realized by stacking the two inductors on top of one another, which not only lowers the required inductance, but also reduces the chip area consumed by the two inductors. The measured conversion efficiency for the prototype circuit, implemented in a 130-nm CMOS technology, shows more than a 15% efficiency improvement over a linear converter for low output voltages rising to a peak efficiency of 77.9% for a 0.9 V output. These efficiencies are comparable to converters implemented with higher Q inductors, validating that the proposed techniques enable high-efficiency converters to be realized with small on-chip inductors.

Journal ArticleDOI
TL;DR: In this article, a new family of multilevel inverters using genetic algorithms is presented, which has the advantage of a reduced number of devices compared to traditional configurations and can be extended to any number of levels.

Journal ArticleDOI
TL;DR: A voltage source inverter with block commutation and an additional dc-dc converter is selected as the most optimal choice for the power electronics interface as it results in the lowest volume of the entire drive system due to lower switching losses.
Abstract: New emerging applications in the areas of portable power generation, small turbocompressors and spindles require the development of ultrahigh-speed, low power electrical drives. A 500 000 r/min, 100 W electrical drive system is presented. Because of the ultrahigh-speed requirements, standard machine design and power electronic topology choices no longer apply and the complete drive system has to be considered. A permanent magnet machine with a slotless litz-wire winding is used, which results in a low motor inductance and a high fundamental machine frequency. Three different combinations of power electronic topologies and commutation strategies have been experimentally investigated. A voltage source inverter with block commutation and an additional dc-dc converter is selected as the most optimal choice for the power electronics interface as it results in the lowest volume of the entire drive system due to lower switching losses, no heat sink cooling required, a small number of semiconductor devices, and relatively simple control implementation in a low cost digital signal processor.

Proceedings ArticleDOI
07 Apr 2008
TL;DR: The architecture thus enables a generalized System.-on-Chip (SoC) platform in which the topology can be customized for the application that is currently running on the chip, including long links and direct links between IP-blocks.
Abstract: This paper presents a network-on-chip (NoC) architecture that enables the network topology to be reconfigured. The architecture thus enables a generalized System.-on-Chip (SoC) platform in which the topology can be customized for the application that is currently running on the chip, including long links and direct links between IP-blocks. The configurability is inserted as a layer between routers and links, and the architecture can therefore be used in combination with existing NoC routers, making it a general architecture. The topology is configured using energy-efficient topology switches based on physical circuit-switching as found in FPGAs. The paper presents the ReNoC (Reconfigurable NoC) architecture and evaluates its potential. The evaluation design shows a 56% decrease in power consumption compared to a static 2D mesh topology.

Journal ArticleDOI
TL;DR: In this paper, a multilevel inverter topology feeding a three-phase open-end winding machine is analyzed, which is based on the use of two insulated DC supplies, each one feeding a standard two-level 3-phase inverter.
Abstract: A multilevel inverter topology feeding a three-phase open-end winding machine is analyzed in this paper. The scheme is based on the use of two insulated DC supplies, each one feeding a standard two-level three-phase inverter. The three-phase six-wire winding is connected across the output terminals of the two inverters. A new modulation technique that is able to regulate the sharing of the output power between the two DC sources in each switching cycle is presented. The performance of the whole system has been verified by both numerical and experimental tests.

Journal ArticleDOI
TL;DR: In this paper, a new PWM method that effectively utilises the standard three-phase modulators in conjunction with appropriate modifications to generate modulation signals for all five legs of the voltage source inverter is presented.
Abstract: Industrial applications often require a number of variable speed electric drives. In the majority of cases, these multi-motor drive systems require independent control of individual motors. Over the past decade, research efforts have been made to reduce the number of power electronic devices required in multi-motor drive systems in order to reduce the overall complexity and hence cost of the drive. It has been shown recently that it is possible to independently control two three-phase induction machines using a five-leg voltage source inverter (VSI) as the supply, with one inverter leg being common to both machines. The existing pulse-width modulation (PWM) methods for this supply topology either limit the amount of DC bus voltage available to each machine or lead to uneven and increased switching frequency across five legs of the VSI. A new PWM method that effectively utilises the standard three-phase modulators in conjunction with appropriate modifications to generate modulation signals for all five legs of the VSI is presented. It enables an arbitrary distribution of the available DC bus voltage between the two machines. The considered supply topology, when utilised in conjunction with the developed PWM technique, is well suited to constant power applications such as centre-driven winders. Verification of the developed modulation method and its applicability to winder systems are demonstrated by experimental testing that includes both steady state and transient operation.