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Showing papers on "Topology (electrical circuits) published in 2017"


Journal ArticleDOI
TL;DR: It is theoretically shown that distributed consensus tracking in the closed-loop MASs equipped with the designed protocols can be ensured if each possible topology contains a directed spanning tree rooted at the leader and the dwell time for the switchings among different topology is less than a derived positive quantity.
Abstract: This paper deals with a consensus tracking problem for multiagent systems (MASs) with Lipschitz-type nonlinear dynamics and directed switching topology. Unlike most existing works where the relative full state measurements of neighboring agents are utilized, it is assumed that only the relative output measurements of neighboring agents are available for coordination. To achieve consensus tracking in the considered MASs, a new class of observer-based protocols is proposed. By appropriately constructing some topology-dependent multiple Lyapunov functions, it is theoretically shown that distributed consensus tracking in the closed-loop MASs equipped with the designed protocols can be ensured if each possible topology contains a directed spanning tree rooted at the leader and the dwell time for the switchings among different topology is less than a derived positive quantity. Interestingly, it is found that the communication topology for observers’ states may be independent with that of the feedback signals. The derived results are further extended to the case of directed switching topology with only average dwell time constraints. Finally, the effectiveness of the analytical results is demonstrated via numerical simulations.

193 citations


Journal ArticleDOI
TL;DR: A new cascade switch-ladder multilevel inverter topology is presented which can generate a large number of output voltage levels and requires fewer numbers of components than other structures.
Abstract: In this paper, a new cascade switch-ladder multilevel inverter topology is presented which can generate a large number of output voltage levels. First, a fundamental switch-ladder multilevel inverter structure is described. Then, the structure of recommended cascade topology based on series connection of fundamental switch-ladder topologies is presented. To generate maximum number of levels with minimum number of switching elements, dc sources, and voltage on switches, the proposed cascade topology is optimized. Comparison results prove that the presented cascade topology requires fewer numbers of components. Also, the value of voltage rating on switches is less than other structures. Experimental results for two topologies are analyzed to verify the performance of the proposed topology.

180 citations


Journal ArticleDOI
TL;DR: In this paper, an inductive power transfer (IPT) charging method for electric bicycles is proposed to achieve constant current and constant voltage output without feedback control strategies or communication link between transmitter side and receiver side.
Abstract: It is more convenient and safer to employ inductive power transfer (IPT) systems to charge the battery pack of electric bicycles (EBs) than conventional plug-in systems. An IPT charging method suitable for charging massive EBs is proposed to achieve constant current (CC) and constant voltage (CV) output without feedback control strategies or communication link between transmitter side and receiver side. Two ac switches (ACSs) and an auxiliary capacitor utilized at receiver side are employed to be operated once to change the charging modes from CC mode to CV mode. The characteristics of the load-independent current output in the CC mode and load-independent voltage output in the CV mode are achieved by properly selecting the passive parameters of inductances and capacitors, so that no sophisticated control strategies are required to regulate the output as per the charging profile. The feasibility of proposed method has been verified with an experimental prototype in form of efficiency, stability of output current and voltage in CC/CV mode. The simple and economical approach is suitable for the massive EBs charging system with only one inverter, especially in China.

174 citations


Journal ArticleDOI
TL;DR: In this article, a dual-bridge LLC resonant converter for wide input applications is proposed and the topology is an integration of a half-bridge (HB) LLC circuit and a full-bridge circuit.
Abstract: This paper proposes a dual-bridge (DB) LLC resonant converter for wide input applications. The topology is an integration of a half-bridge (HB) LLC circuit and a full-bridge (FB) LLC circuit. The fixed-frequency pulsewidth-modulated (PWM) control is employed and a range of twice the minimum input voltage can be covered. Compared with the traditional pulse frequency modulation (PFM) controlled HB/FB LLC resonant converter, the voltage gain range is independent of the quality factor, and the magnetizing inductor has little influence on the voltage gain, which can simplify the parameter selection process and benefit the design of magnetic components as well. Over the full load range, zero-voltage switching (ZVS) and zero-current switching (ZCS) can be achieved for primary switches and secondary rectifier diodes, respectively. Detailed analysis on the modulation schedule and operating principle of the proposed converter is presented along with the converter performance. Finally, all theoretical analysis and characteristics are verified by experimental results from a 120-V to 240-V input 24 V/20 A output converter prototype.

167 citations


Journal ArticleDOI
TL;DR: The proposed approach segments retinal vessels accurately with a much faster processing speed and can be easily applied to other biomedical segmentation tasks, making it suitable for real-world clinical applications.
Abstract: Changes in the appearance of retinal blood vessels are an important indicator for various ophthalmologic and cardiovascular diseases, including diabetes, hypertension, arteriosclerosis, and choroidal neovascularization Vessel segmentation from retinal images is very challenging because of low blood vessel contrast, intricate vessel topology, and the presence of pathologies such as microaneurysms and hemorrhages To overcome these challenges, we propose a neural network-based method for vessel segmentation A deep supervised fully convolutional network is developed by leveraging multi-level hierarchical features of the deep networks To improve the discriminative capability of features in lower layers of the deep network and guide the gradient back propagation to overcome gradient vanishing, deep supervision with auxiliary classifiers is incorporated in some intermediate layers of the network Moreover, the transferred knowledge learned from other domains is used to alleviate the issue of insufficient medical training data The proposed approach does not rely on hand-crafted features and needs no problem-specific preprocessing or postprocessing, which reduces the impact of subjective factors We evaluate the proposed method on three publicly available databases, the DRIVE, STARE, and CHASE_DB1 databases Extensive experiments demonstrate that our approach achieves better or comparable performance to state-of-the-art methods with a much faster processing speed, making it suitable for real-world clinical applications The results of cross-training experiments demonstrate its robustness with respect to the training set The proposed approach segments retinal vessels accurately with a much faster processing speed and can be easily applied to other biomedical segmentation tasks

164 citations


Journal ArticleDOI
TL;DR: The concept of controllability destructive nodes is proposed, which indicates that the difficulty in graphical characterization turns out to be the identification of topology structures of controlla destructive nodes.
Abstract: Recently, graphical characterization of multiagent controllability has been studied extensively. A major effort in the study is to determine controllability directly from topology structures of communication graphs. In this paper, we proposed the concept of controllability destructive nodes, which indicates that the difficulty in graphical characterization turns out to be the identification of topology structures of controllability destructive nodes. It is shown that each kind of double and triple controllability destructive nodes happens to have a uniform topology structure which can be defined similarly. The definition, however, is verified not to be applicable to the topology structures of quadruple controllability destructive (QCD) nodes. Even so, a design method is proposed to uncover topology structures of QCD nodes for graphs with any size, and a complete graphical characterization is presented for the graphs consisting of five vertices. One advantage of the established complete graphical characterization is that the controllability of any graph with any selection of leaders can be determined directly from the identified/defined destructive topology structures. The results generate several necessary and sufficient graphical conditions for controllability. A key step of arriving at these results is the discovery of a relationship between the topology structure of the controllability destructive nodes and a corresponding eigenvector of the Laplacian matrix.

163 citations


Journal ArticleDOI
TL;DR: In this article, a series of switched-capacitor (SC) cell balancing circuits is proposed for rechargeable energy storage devices like battery and supercapacitors strings in order to minimize the equivalent resistance.
Abstract: A series of switched-capacitor (SC) cell balancing circuits is proposed for rechargeable energy storage devices like battery and supercapacitor strings in this paper. Taking a basic SC-based cell balancing unit as an equivalent resistor, the behavioral models of the proposed cell balancing circuits are developed to evaluate their balancing performance. Comparing with existing SC-based cell balancing circuits, the main advantage of the proposed circuits is that their balancing speed is independent of both of the number of battery cells and initial mismatch distribution of cell voltages. In order to improve the operation performance of SC-based cell balancing circuits in the respect of minimizing the equivalent resistance, optimizing methodologies of circuit parameters are introduced by referring the concepts of slow switching limit and fast switching limit as well as inductive switching limit of SC power converters. Simulation and experimental results are provided to verify the feasibility of the proposed cell balancing circuits.

156 citations


Journal ArticleDOI
TL;DR: This paper proposes a methodology that utilizes new data from sensor-equipped DER devices to obtain the distribution grid topology and presents a graphical model to describe the probabilistic relationship among different voltage measurements.
Abstract: Distributed energy resources (DERs), such as photovoltaic, wind, and gas generators, are connected to the grid more than ever before, which introduces tremendous changes in the distribution grid. Due to these changes, it is important to understand where these DERs are connected in order to sustainably operate the distribution grid. But the exact distribution system topology is difficult to obtain due to frequent distribution grid reconfigurations and insufficient knowledge about new components. In this paper, we propose a methodology that utilizes new data from sensor-equipped DER devices to obtain the distribution grid topology. Specifically, a graphical model is presented to describe the probabilistic relationship among different voltage measurements. With power flow analysis, a mutual information-based identification algorithm is proposed to deal with tree and partially meshed networks. Simulation results show highly accurate connectivity identification in the IEEE standard distribution test systems and Electric Power Research Institute test systems.

155 citations


Journal ArticleDOI
TL;DR: The results suggest that dynamics of a gene circuit is mainly determined by its topology, not by detailed circuit parameters, and provides a theoretical foundation for circuit-based systems biology modeling.
Abstract: One of the most important roles of cells is performing their cellular tasks properly for survival. Cells usually achieve robust functionality, for example, cell-fate decision-making and signal transduction, through multiple layers of regulation involving many genes. Despite the combinatorial complexity of gene regulation, its quantitative behavior has been typically studied on the basis of experimentally verified core gene regulatory circuitry, composed of a small set of important elements. It is still unclear how such a core circuit operates in the presence of many other regulatory molecules and in a crowded and noisy cellular environment. Here we report a new computational method, named random circuit perturbation (RACIPE), for interrogating the robust dynamical behavior of a gene regulatory circuit even without accurate measurements of circuit kinetic parameters. RACIPE generates an ensemble of random kinetic models corresponding to a fixed circuit topology, and utilizes statistical tools to identify generic properties of the circuit. By applying RACIPE to simple toggle-switch-like motifs, we observed that the stable states of all models converge to experimentally observed gene state clusters even when the parameters are strongly perturbed. RACIPE was further applied to a proposed 22-gene network of the Epithelial-to-Mesenchymal Transition (EMT), from which we identified four experimentally observed gene states, including the states that are associated with two different types of hybrid Epithelial/Mesenchymal phenotypes. Our results suggest that dynamics of a gene circuit is mainly determined by its topology, not by detailed circuit parameters. Our work provides a theoretical foundation for circuit-based systems biology modeling. We anticipate RACIPE to be a powerful tool to predict and decode circuit design principles in an unbiased manner, and to quantitatively evaluate the robustness and heterogeneity of gene expression.

153 citations


Journal ArticleDOI
TL;DR: In this article, a three-phase hybrid cascaded modular multilevel inverter topology is derived from the proposed modified H-bridge module, which enables the tranformerless operation and enhances the power quality.
Abstract: This paper presents a three-phase hybrid cascaded modular multilevel inverter topology which is derived from the proposed modified H-bridge module. This topology results in the reduction of number of power switches, losses, installation area, voltage stress and converter cost. For renewable energy environment such as photovoltaic (PV) connected to the microgrid system, it enables the tranformerless operation and enhances the power quality. This multilevel inverter is an effective and efficient power electronic interface strategy for renewable energy systems. The basic operation of single module and the proposed cascaded hybrid topology is explained. The ability to operate in both symmetrical and asymmetrical modes is analyzed. The comparative analysis is done with classical cascaded H-bridge and flying capacitor multilevel inverters. The nearest level control method is employed to generate the gating signals for the power semiconductor switches. To verify the applicability and performance of the proposed structure in PV renewable energy environment, simulation results are carried out by MATLAB/Simulink under both steady-state and dynamic conditions. Experimental results are presented to validate the simulation results.

148 citations


Journal ArticleDOI
TL;DR: In this paper, the authors proposed several new topologies for various purpose of improvement with respect to the characters of existing topologies, such as Cuk-type, Super-Sepic/Zeta-type and interleaved Buck/Boost-type voltage balancers.
Abstract: A voltage balancer that transfers unipolar dc bus configuration to bipolar dc bus configuration has been widely employed in dc microgrid. Fortunately, unbalanced power flow between positive and negative dc buses can be eliminated through a well-designed voltage balancer. Based on the analysis of a Buck/Boost-type voltage balancer, a deduction method for a series of voltage balancers is proposed in this paper, and is further investigated by applying to other existing voltage balancers. Consequently, several new topologies are proposed for various purpose of improvement with respect to the characters of existing topologies. Furthermore, four new topologies, i.e., Cuk-type, Super-Sepic/Zeta-type, and interleaved Buck/Boost-type voltage balancers have been proposed, which are compared with existing ones in terms of key characters. Finally, the interleaved Buck/Boost topology has been selected as an example for verification and a laboratory prototype is therefore built. The experimental results show a promising effect of current sharing and a good dynamic characteristic of the proposed interleaved average current control strategy based on interleaved sampling while maintaining a balanced power flow between the two dc buses.

Journal ArticleDOI
TL;DR: This article surveys various fault detection techniques and provides a new taxonomy to integrate new fault Detection techniques, and performs a qualitative comparison of the latest fault detection algorithms.

Journal ArticleDOI
TL;DR: This survey provides discussions related to the possible threats relevant to each layer of the SDN architecture, highlights the role of the topology discovery in the traditional network and SDN, and presents a thematic taxonomy of topologyiscovery in SDN.
Abstract: The fundamental role of the software defined networks (SDNs) is to decouple the data plane from the control plane, thus providing a logically centralized visibility of the entire network to the controller. This enables the applications to innovate through network programmability. To establish a centralized visibility, a controller is required to discover a network topology of the entire SDN infrastructure. However, discovering a network topology is challenging due to: 1) the frequent migration of the virtual machines in the data centers; 2) lack of authentication mechanisms; 3) scarcity of the SDN standards; and 4) integration of security mechanisms for the topology discovery. To this end, in this paper, we present a comprehensive survey of the topology discovery and the associated security implications in SDNs. This survey provides discussions related to the possible threats relevant to each layer of the SDN architecture, highlights the role of the topology discovery in the traditional network and SDN, presents a thematic taxonomy of topology discovery in SDN, and provides insights into the potential threats to the topology discovery along with its state-of-the-art solutions in SDN. Finally, this survey also presents future challenges and research directions in the field of SDN topology discovery.

Journal ArticleDOI
TL;DR: In this paper, a three-phase voltage source inverter (VSI) topology is proposed to reduce the common mode (CM) voltage and electromagnetic interference (EMI) of electric motor drives.
Abstract: This letter presents a three-phase voltage source inverter (VSI) topology to reduce the common mode (CM) voltage and electromagnetic interference (EMI) of electric motor drives. Instead of using filters, active or passive, or specific pulse width modulated (PWM) techniques to reduce the CM voltage, the proposed topology has inherently less CM voltage generation. With the addition of two switches placed in series on the dc lines, this topology effectively reduces the CM voltage during zero switching states by “floating” the inverter from the dc source. This topology can be implemented with any PWM method and does not add any additional complexity to the standard control techniques. The operation and CM reduction capability of the topology is first demonstrated in simulation and then verified with experimental results. A comparison of both common mode voltage and EMI is made to a conventional three-phase VSI to demonstrate the effectiveness of the proposed topology.

Journal ArticleDOI
TL;DR: In this article, the authors present an efficient power converter based on a switched-inductor ladder topology, instrumentation and an embedded control platform that can provide both active balancing and real-time diagnostic capability through electrochemical impedance spectroscopy (EIS).
Abstract: Electrochemical energy storage is critical for a range of applications spanning electrified transportation and grid energy storage, and there is a need to further improve both the active management and diagnostic capability of current battery management systems. Lithium-based battery chemistries have been favored for their high energy and power densities but require precise management to prevent premature degradation and failure. This work presents an efficient power converter (based on a switched-inductor ladder topology), instrumentation, and an embedded control platform that can provide both active balancing and real-time diagnostic capability through electrochemical impedance spectroscopy (EIS). A digital proportional-integral controller enforces sinusoidal reference signals from a direct digital synthesizer, enabling the power converter to perturb the cells and extract their impedance. Cell-level diagnostics allow for noninvasive measurement of physical electrochemical battery properties that can be used to assess the state of charge and state of health of a battery. A ladder converter prototype was implemented on a printed circuit board to perform EIS on two Panasonic 18650 cells in series. Experimental results showed balancing converter efficiency of 95%, and the accuracy of the prototype was validated through comparison to a state-of-the-art commercial benchtop system.

Journal ArticleDOI
TL;DR: In this article, the authors proposed a new nine-level inverter for medium and high power applications, which consists of a three-level active neutral-point-clamped (ANPC) inverter connected in series with a floating capacitor (FC) fed H-bridge.
Abstract: This paper proposes a new nine-level inverter for medium- and high-power applications. The proposed topology comprises of a three-level (3L) active neutral-point-clamped (ANPC) inverter connected in series with a floating capacitor (FC) fed H-bridge. Besides, two additional switches operating at line frequency are appended across the dc link of the 3L ANPC structure. Compared with conventional hybrid cascaded inverters, the primary advantage of this addition is doubling of the resulting root mean square output voltage. This amelioration is achieved while preserving the standard 3L ANPC and H-bridge structures with minimum topological modification. A simple logic-gate-based voltage balancing scheme is developed to regulate the FC voltage. The proposed voltage balancing method is independent of load power factor, inverter modulation index, and can balance the voltage across FC instantaneously. The step-by-step formulation of logical expressions for the generation of gating pulses is deliberated in detail and can be generalized for any $n$ -level inverter. Further, simulation results as well as the experimental measurements obtained from the laboratory prototype are presented to validate the effectiveness and practicability of the proposed configuration. Finally, the notable merits of the proposed inverter over the prior art topologies is established through a comprehensive comparative study.

Journal ArticleDOI
TL;DR: In this article, a hybrid MMC topology is introduced, which significantly reduces the voltage ripple of capacitors, particularly at low motor speeds, and this topology does not introduce any motor common-mode voltage; as a result, there are no insulation and bearing current problems.
Abstract: Modular multilevel converters (MMC) have revolutionized the voltage-sourced converter-based high-voltage direct current transmission, but not yet got widespread application in medium-voltage variable-speed motor drives, because of the large capacitor voltage ripples at low motor speeds. In this paper, a novel hybrid MMC topology is introduced, which significantly reduces the voltage ripple of capacitors, particularly at low motor speeds. Moreover, this topology does not introduce any motor common-mode voltage; as a result, there are no insulation and bearing current problems. Additionally, the current stress can remain at rated value throughout the whole speed range; thus, no device needs to be oversized and converter efficiency can be ensured. Operating principle of this hybrid topology is explained, and control schemes are also developed. Validity and performance of the proposed topology are verified by simulation and experimental results.

Journal ArticleDOI
TL;DR: In this article, the performance of modular multilevel converters with integrated battery cells when used as traction drives for battery electric vehicles was evaluated. But the performance was not compared with a traditional two-level converter.
Abstract: This paper evaluates the performance of modular multilevel converters with integrated battery cells when used as traction drives for battery electric vehicles. In this topology, individual battery cells are connected to the dc link of the converter submodules, allowing the highest flexibility for the discharge and recharge. The traditional battery management system of battery electric vehicles is replaced by the control of the converter, which individually balances all the cells. The performance of the converter as a traction drive is assessed in terms of torque–speed characteristic and power loss for the full frequency range, including field weakening. Conduction and switching losses for the modular multilevel converter are calculated using a simplified model, based on the datasheet of power devices. The performance of the modular multilevel converter is then compared with a traditional two-level converter. The loss model of the modular multilevel converter is finally validated by experimental tests on a small-scale prototype of traction drive.

Journal ArticleDOI
TL;DR: In this paper, a 6S-5L-ANPC topology is proposed for photovoltaic grid-connected applications, where the flying-capacitor capacitance is designed under both active and reactive power conditions.
Abstract: Multilevel inverters are one of the preferred solutions for medium-voltage and high-power applications and have found successful industrial applications. Five-level active neutral point clamped inverter (5L-ANPC) is one of the most popular topologies among five-level inverters. A six-switch 5L-ANPC (6S-5L-ANPC) topology is proposed. Compared to the conventional 5L-ANPC inverters, the 6S-5L-ANPC reduces two active switches and has lower conduction loss. The proposed modulation enables the 6S-5L-ANPC inverter to operate under both active and reactive power conditions. The flying-capacitor capacitance is designed under both active and reactive power conditions. The analysis shows the proposed topology is suitable for photovoltaic grid-connected applications. A 1 KVA single-phase experimental prototype is built to verify the validity and flexibility of the proposed topology and modulation method.

Journal ArticleDOI
TL;DR: A novel three-phase parallel grid-connected multilevel inverter topology with a novel switching strategy is proposed to feed a microgrid from renewable energy sources (RES) to overcome the problem of the polluted sinusoidal output in classical inverters and to reduce component count.
Abstract: In this paper, a novel three-phase parallel grid-connected multilevel inverter topology with a novel switching strategy is proposed. This inverter is intended to feed a microgrid from renewable energy sources (RES) to overcome the problem of the polluted sinusoidal output in classical inverters and to reduce component count, particularly for generating a multilevel waveform with a large number of levels. The proposed power converter consists of $n$ two-level $(n+1)$ phase inverters connected in parallel, where $n$ is the number of RES. The more the number of RES, the more the number of voltage levels, the more faithful is the output sinusoidal waveform. In the proposed topology, both voltage pulse width and height are modulated and precalculated by using a pulse width and height modulation so as to reduce the number of switching states (i.e., switching losses) and the total harmonic distortion. The topology is investigated through simulations and validated experimentally with a laboratory prototype. Compliance with the $\text{IEEE 519-1992}$ and $\text{IEC 61000-3-12}$ standards is presented and an exhaustive comparison of the proposed topology is made against the classical cascaded H-bridge topology.

Journal ArticleDOI
TL;DR: In this paper, the authors proposed a seven-switch 5L-ANPC (7S-5L -ANPC) topology, which employs only seven active switches and two discrete diodes.
Abstract: Multilevel inverters are receiving more attentions nowadays as one of preferred solutions for medium- and high-power applications. As one of the most popular hybrid multilevel inverter topologies, the five-level active-neutral-point-clamped inverter (5L-ANPC) combines the features of the conventional flying-capacitor type and neutral-point-clamped (NPC) type inverter and was commercially used for industrial applications. In order to further decrease the number of active switches, this paper proposes a seven-switch 5L-ANPC (7S-5L-ANPC) topology, which employs only seven active switches and two discrete diodes. The analysis has shown a lower current rating can be selected for the seventh switch under high power factor condition, which is verified by simulation results. The modulation strategy for 7S-5L-ANPC inverter is discussed. A 1 kVA single-phase experimental prototype is built to verify the validity and flexibility of the proposed topology and modulation method.

Journal ArticleDOI
Xiaoqiang Guo1
TL;DR: In this brief, a novel single-phase current source H5 (CH5) inverter is proposed, only one extra IGBT is needed, but the leakage current can be significantly suppressed with a novel space vector modulation.
Abstract: Versatile single-phase voltage source inverters with unipolar voltage pulse and leakage current elimination capability have been extensively investigated for transformerless PV systems in the literature. However, the innovative current source inverters with leakage current elimination capability are not well explored. In this brief, a novel single-phase current source H5 (CH5) inverter is proposed. Only one extra IGBT is needed, but the leakage current can be significantly suppressed with a novel space vector modulation. Finally, the experimental tests are carried out on a single-phase CH5 inverter and the experimental results verify the effectiveness of the proposed topology and space vector modulation.

Journal ArticleDOI
TL;DR: This paper presents the first empirical estimate of a 3D-MFD at the urban scale, using data from loop detectors and automatic vehicle location devices of the public transport vehicles in the city of Zurich, Switzerland, to estimate the effects of the vehicle accumulation on car and public transport speeds under multi-modal traffic conditions.
Abstract: Traffic is multi-modal in most cities. However, the impacts of different transport modes on traffic performance and on each other are unclear – especially at the network level. The recent extension of the macroscopic fundamental diagram (MFD) into the 3D-MFD offers a novel framework to address this gap at the urban scale. The 3D-MFD relates the network accumulation of cars and public transport vehicles to the network travel production, for either vehicles or passengers. No empirical 3D-MFD has been reported so far. In this paper, we present the first empirical estimate of a 3D-MFD at the urban scale. To this end, we use data from loop detectors and automatic vehicle location devices (AVL) of the public transport vehicles in the city of Zurich, Switzerland. We compare two different areas within the city, that differ in their topology and share of dedicated lanes for public transport. We propose a statistical model of the 3D-MFD, which estimates the effects of the vehicle accumulation on car and public transport speeds under multi-modal traffic conditions. The results quantify the effects of both, vehicles and passengers, and confirm that a greater share of dedicated lanes reduces the marginal effects of public transport vehicles on car speeds. Lastly, we derive a new application of the 3D-MFD by identifying the share of public transport users that maximizes the journey speeds in an urban network accounting for all motorized transport modes.

Journal ArticleDOI
TL;DR: In this article, an automatic switched-coupling-capacitor equalizer (SCCE) is proposed, which can realize the any-cells-to-any-cells equalization for a battery string.
Abstract: Due to the low cost, small size, and easy control, the switched-capacitor (SC) equalizer is promising among all types of active cell balancing methods. However, the balancing speed is generally slow and the balancing efficiency is seriously low when the SC equalizer is applied into a long battery string. Therefore, an automatic switched-coupling-capacitor equalizer (SCCE) is proposed, which can realize the any-cells-to-any-cells equalization for a battery string. Only two switches and one capacitor are required for each battery cell. All mosfet s are controlled by one pair of complementary pulse width modulation signals, and energy can be automatically and directly delivered from any higher voltage cells to any lower voltage ones without the need of cell monitoring circuits, leading to a high balancing efficiency and speed independent of the cell number and the initial cell voltages. Contrary to the conventional equalizers using additional components for the equalization among modules, the proposed equalizer shares a single converter for the equalization among cells and modules, resulting in smaller size and lower cost. A prototype for four lithium battery cells is implemented, and an experimental comparison between the proposed SCCE and the conventional SC equalizer is presented. Experimental results show the proposed topology exhibits a substantially improved balancing performance, and the measured peak efficiency is 92.7%.

Journal ArticleDOI
TL;DR: A new cascaded high step-up multilevel converter topology is designed, which is based on the series connection of several switched-capacitor submultilevel units that is optimized to minimize the number of capacitors, power switches, and the value of voltage on switches for given levels.
Abstract: In this paper, a new cascaded high step-up multilevel converter topology is designed, which is based on the series connection of several switched-capacitor submultilevel units. The voltage gain of proposed multilevel converter is related to the number of used switches-capacitor units. The main advantage of proposed topology is inherent voltage balancing of used capacitors. The proposed cascade topology is optimized to minimize the number of capacitors, power switches, and the value of voltage on switches for given levels. The proposed topology is compared with other high step-up multilevel converter topologies and conventional structures. The comparison results show that the presented structure requires the least number of switches and dc sources. Moreover, the voltage on the switches of proposed topology is low. In order to confirm the operation of proposed high step-up multilevel converter, both experimental and simulation works are provided.

Journal ArticleDOI
TL;DR: By employing the proposed HCLC, dc line fault in the multiterminal system can be isolated effectively with existing DCCB technology, and fast system restoration without power interruption of healthy part can be achieved.
Abstract: The high fault current of dc line is a major threat to multiterminal voltage-source-converter-based HVDC (VSC-HVDC) system. However, dc circuit breaker (DCCB) with large capacity and fast breaking speed is still under development. Therefore, fault current limitation is vital for the multiterminal VSC-HV DC system. This paper proposes a simple and easily applied hybrid current-limiting circuit (HCLC) at dc side, which consists of a current-limiting inductor (CLI) and an energy dissipation circuit (EDC) in parallel with the CLI. The CLI is designed to reduce the requirement for the DCCB's capacity and breaking speed. The EDC, which consists of thyristor-controlled resistors, is proposed to reduce the stress on energy absorption element (metal oxide arrester) in DCCB and to accelerate the fault current interruption. The design and discussion about the HCLC parameters are performed in detail. By employing the proposed HCLC, dc line fault in the multiterminal system can be isolated effectively with existing DCCB technology, and fast system restoration without power interruption of healthy part can be achieved. Numerous simulations with real-time digital simulator and comparisons with traditional schemes have demonstrated the promising performance of the proposed HCLC. The effectiveness of the HCLC's topology has also been verified by a simplified and scaled test circuit.

Journal ArticleDOI
TL;DR: In this article, an analog implementation of the fractional-order controller using an active element in form of the Operational Transconductance Amplifier (OTAM) has been presented.
Abstract: This paper deals with a new method for analog implementation of the fractional-order controller using an active element in form of the Operational Transconductance Amplifier. Transfer function of such controller is performed by the Inverse-Follow-the-Leader-Feedback topology. Presented implementation is resistorless, energy effective and suitable for realization in integrated form. Proposed and implemented fractional-order controller is used for a DC motor control. Obtained simulation results in frequency and time domains are presented as well.

Journal ArticleDOI
TL;DR: The quasi-resonance technique is utilized to suppress the current spikes that emerge from the instantaneous parallel connection of the series-connected capacitors and the input source, decreasing the capacitance, increasing their lifetimes, and reducing the electromagnetic interference, simultaneously.
Abstract: In this paper, a quasi-resonant switched-capacitor (QRSC) multilevel inverter (MLI) is proposed with self-voltage balancing for single-phase high-frequency ac (HFAC) microgrids. It is composed of a QRSC circuit (QRSCC) in the frontend and an H-bridge circuit in the backend. The input voltage is divided averagely by the series-connected capacitors in QRSCC, and any voltage level can be obtained by increasing the capacitor number. The different operational mechanism and the resulting different application make up for the deficiency of the existing switched-capacitor topologies. The capacitors are connected in parallel partially or wholly when discharging to the load, thus the self-voltage balancing is realized without any high-frequency balancing algorithm. In other words, the proposed QRSC MLI is especially adapted for HFAC fields, where fundamental frequency modulation is preferred when considering the switching frequency and the resulting loss. The quasi-resonance technique is utilized to suppress the current spikes that emerge from the instantaneous parallel connection of the series-connected capacitors and the input source, decreasing the capacitance, increasing their lifetimes, and reducing the electromagnetic interference, simultaneously. The circuit analysis, power loss analysis, and comparisons with typical switched-capacitor topologies are presented. To evaluate the superior performances, a nine-level prototype is designed and implemented in both simulation and experiment, whose results confirm the feasibility of the proposed QRSC MLI.

Journal ArticleDOI
TL;DR: This paper studies network-based practical leader-following consensus problem of heterogeneous multiagent systems with Lipschitz nonlinear dynamics under both fixed and switching topologies with Lyapunov–Krasovskii method.
Abstract: This paper studies network-based practical leader-following consensus problem of heterogeneous multiagent systems with Lipschitz nonlinear dynamics under both fixed and switching topologies. Considering the effect of network-induced delay, a network-based leader-following consensus protocol with heterogeneous gain matrix is proposed for each follower agent. By employing Lyapunov–Krasovskii method, a sufficient condition for designing the network-based consensus controller gain is derived such that the leader-following consensus error exponentially converges to a bounded region under a fixed topology. Correspondingly, the proposed design approach is then extended to the case of switching topology. Two numerical examples with networked Chua’s circuits are given to show the efficiency of the design method proposed in this paper.

Journal ArticleDOI
TL;DR: In this paper, a real-time controller for a modular multilevel series parallel converter (MMSPC) is presented, which allows the batteries to be dynamically rewired in various series-parallel configurations, generating a wide range of output voltage levels.
Abstract: This paper presents a multiobjective real-time controller for a modular multilevel converter capable of parallel module connectivity, the so-called modular multilevel series parallel converter (MMSPC). The MMSPC topology allows the batteries to be dynamically rewired in various series–parallel configurations, generating a wide range of output voltage levels. The novel control method parallelizes the modules to balance their voltages without the need for individual module voltage monitoring. Additionally, the controller optimizes across the large number of feasible system configurations to minimize switching and conduction losses. Finally, the controller efficiently encodes the system configuration with module interconnection states rather than the module switch states, which substantially simplifies control. Furthermore, this work experimentally validates the MMSPC topology and concept. In the prototype, the parallel mode reduced the system losses at 5 kW output power by 18% and 24% for load power factors of 1.0 and 0.8, respectively. Sensorless balancing via parallelization maintained well-matched module voltages (standard deviation = 0.045 V) over a 5-h battery discharge with highly variable load current. The reduced conduction losses and simple balancing capability of the MMSPC can enable new applications at medium and low voltages that benefit from its high-quality output, elimination of filtering magnetics, fast response, and modularity.