Topology (electrical circuits)

About: Topology (electrical circuits) is a research topic. Over the lifetime, 33316 publications have been published within this topic receiving 397651 citations. The topic is also known as: topology.

Minimizing Required Energy Storage in Off-Line LED Drivers Based on Series-Input Converter Modules

Abstract: This paper introduces techniques to reduce energy storage in off-line light-emitting diode (LED) drivers. Rather than targeting the ideals of unity input power factor (PF) and constant LED current, a topology is selected to minimize the required energy storage with the more practical targets of 0.9 PF and a selectable LED current ripple. The objectives are accomplished using a combination of the following: first, constant-input-current regulation, which results in 0.9 PF and 34% less required energy storage than when using unity power factor, and is achieved with a simple reference signal that does not require input voltage sensing; second, a two-stage approach that isolates the LED from the capacitor to allow full use of the stored energy; third, a bidirectional second stage (LED string is between the two stages) that processes only the necessary energy storage; and fourth, a selectable regulation band on the LED current ripple to pass through the maximum allowed double-line-frequency ripple. The topology is applied to the series-input modular architecture to utilize low-voltage high-frequency circuits and low-profile components in off-line applications. Experimental results are presented for a series-input system with three modules each driving eight LEDs with 30% double-line-frequency current ripple using small filter capacitors.

Finite-Control-Set Model Predictive Control for Grid-Connected Packed-U-Cells Multilevel Inverter

Abstract: This paper presents a finite-control-set model predictive control (FCS-MPC) for grid-tied packed U cells (PUC) multilevel inverter (MLI). The system under study consists of a single-phase 3-cells PUC inverter connected to the grid through filtering inductor. The proposed competitive topology allows the generation of 7-level output voltage with reduction of passive and active components compared to the conventional MLIs. The aim of the proposed FCS-MPC technique is to achieve, under various operating conditions, grid-tied current injection with unity power factor and low total harmonic distortion while balancing the capacitor voltage. Parameters’ sensitivity analysis was also conducted. The study is conducted on a low-power case study single-phase 3-cells PUC inverter and with possible extension to higher number of cells. Theoretical analysis, simulation, and experimental results are presented and compared.

Synchronization of Time-Delayed Complex Networks With Switching Topology Via Hybrid Actuator Fault and Impulsive Effects Control

Abstract: This article investigates global exponential synchronization almost surely (GES a.s.) of complex networks (CNs) with node delay and switching topology. By introducing transition probability (TP) and mode-dependent average dwell time (MDADT) to the switching signal, the considered model is more practical than the systems with average dwell-time (ADT) switching. Controllers with both impulsive effects and actuator fault feedback are considered. New analytical techniques are developed to obtain sufficient conditions to guarantee the GES a.s. Different from the existing results on the synchronization of switched systems, our results show that the GES a.s. can still be achieved even in the case that the upper bound of the dwell time (DT) of uncontrolled nodes is very large and the lower bound of the DT of controlled nodes is very small. Numerical examples demonstrate the effectiveness and the merits of the theoretical analysis.

Reliability Estimation of Three Single-Phase Topologies in Grid-Connected PV Systems

Abstract: This paper presents the reliability estimation of the power stages in three grid-connected photovoltaic systems. The circuits analyzed are an integrated topology, a two-stage configuration, and a three-stage one, all commutating in the hard-switching mode. The reliability-related parameters, such as the failure rate, are calculated following the procedure outlined in MIL-HDBK 217. A comparison between the topologies is performed, and both the components and the stress factor with the highest contribution to the failure rate are identified. The methods to calculate junction temperature variations are included.

Introducing Loading Uncertainty in Topology Optimization

Abstract: Uncertainty is an important consideration in structural design and optimization to produce robust and reliable solutions. This paper introduces an efficient and accurate approach to robust structural topology optimization. The objective is to minimize expected compliance with uncertainty in loading magnitude and applied direction, where uncertainties are assumed normally distributed and statistically independent. This new approach is analogous to a multiple load case problem where load cases and weights are derived analytically to accurately and efficiently compute expected compliance and sensitivities. Illustrative examples using a level-set-based topology optimization method are then used to demonstrate the proposed approach.