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Topology (electrical circuits)

About: Topology (electrical circuits) is a research topic. Over the lifetime, 33316 publications have been published within this topic receiving 397651 citations. The topic is also known as: topology.


Papers
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Journal ArticleDOI
TL;DR: An 8 channel energy-efficient neural stimulator for generating charge-balanced asymmetric pulses and a novel charge balancing method which has a low level of accuracy on a single pulse and a much higher accuracy over a series of pulses is presented.
Abstract: This paper presents an 8 channel energy-efficient neural stimulator for generating charge-balanced asymmetric pulses. Power consumption is reduced by implementing a fully-integrated DC-DC converter that uses a reconfigurable switched capacitor topology to provide 4 output voltages for Dynamic Voltage Scaling (DVS). DC conversion efficiencies of up to 82% are achieved using integrated capacitances of under 1 nF and the DVS approach offers power savings of up to 50% compared to the front end of a typical current controlled neural stimulator. A novel charge balancing method is implemented which has a low level of accuracy on a single pulse and a much higher accuracy over a series of pulses. The method used is robust to process and component variation and does not require any initial or ongoing calibration. Measured results indicate that the charge imbalance is typically between 0.05%-0.15% of charge injected for a series of pulses. Ex-vivo experiments demonstrate the viability in using this circuit for neural activation. The circuit has been implemented in a commercially-available 0.18 μm HV CMOS technology and occupies a core die area of approximately 2.8 mm2 for an 8 channel implementation.

94 citations

Patent
06 Dec 2000
TL;DR: In this paper, a virtual L 2 TP/VPN tunnel network as well as a system and method for automatic discovery of VPN tunnels using a method such as one based on the spanning tree protocol are disclosed.
Abstract: A virtual L 2 TP/VPN tunnel network as well as a system and method for automatic discovery of VPN tunnels, such as L 2 TP tunnels, and other layer- 2 services using a method such as one based on the spanning tree protocol are disclosed. The method for automatic discovery of layer- 2 services across a network of layer- 2 devices generally comprises transmitting an advertisement message on each tunnel of each layer- 2 device, the advertisement message containing information for generating a spanning tree based on spanning tree algorithm, receiving advertisement message on the tunnels of each layer- 2 device, and processing the received advertisement messages to generate a spanning tree topology of the network of layer- 2 devices whereby each layer- 2 device in the network automatically discovers layer- 2 services of other layer- 2 devices on the network. The transmitting is preferably repeated at predetermined configurable intervals.

94 citations

Journal ArticleDOI
TL;DR: The value of a merged two-stage architecture to provide substantial design benefits in high-input voltage, low-power step down conversion applications, including both wide-range-input dc-dc and line-input ac-dc systems is demonstrated.
Abstract: This paper presents a merged-two-stage circuit topology suitable for either wide-range dc input voltage or ac line voltage at low-to-moderate power levels (e.g., up to 30 W). This two-stage topology is based on a soft-charged switched-capacitor preregulator/transformation stage and a high-frequency magnetic regulator stage. Soft charging of the switched capacitor circuit, zero voltage switching of the high-frequency regulator circuit, and time-based indirect current control are used to maintain high efficiency, high power density, and high power factor. The proposed architecture is applied to an LED driver circuit, and two implementations are demonstrated: a wide input voltage range dc-dc converter and a line interfaced ac-dc converter. The dc-dc converter shows 88%-96% efficiency at 30-W power across 25-200-V input voltage range, and the ac-dc converter achieves 88% efficiency with 0.93 power factor at 8.4-W average power. Contributions of this paper include: 1) demonstrating the value of a merged two-stage architecture to provide substantial design benefits in high-input voltage, low-power step down conversion applications, including both wide-range-input dc-dc and line-input ac-dc systems; 2) introduction of a multimode soft-charged SC stage for the merged architecture that enables compression of an 8:1 input voltage range into a 2:1 intermediate range, along with its implementation, loss considerations, and driving methods; and 3) merging of this topology with an resonant transition discontinuous-mode inverted buck stage and pseudocurrent control to enable step-down power conversion (e.g., for LED lighting) operating at greatly increased frequencies and reduced magnetics size than with more conventional approaches.

94 citations

Journal ArticleDOI
TL;DR: Simulation and experimental studies verify the performances of the proposed model predictive control scheme for quasi-Z-source three-phase four-leg inverter under balanced and unbalanced load conditions as well as single-phase open-circuit fault condition.
Abstract: This paper presents a model predictive control (MPC) scheme for quasi-Z-source (qZS) three-phase four-leg inverter. In order to cope with the drawbacks of traditional voltage source inverters (VSIs), a qZS three-phase four-leg inverter topology is proposed. This topology features a wide range of voltage gain which is suitable for applications in renewable energy-based power systems, where the output of the renewable energy sources varies widely with operating conditions such as wind speed, temperature, and solar irradiation. To improve the capability of the controller, an MPC scheme is used which implements a discrete-time model of the system. The controller handles each phase current independently, which adds flexibility to the system. Simulation and experimental studies verify the performances of the proposed control strategy under balanced and unbalanced load conditions as well as single-phase open-circuit fault condition.

94 citations

Journal ArticleDOI
TL;DR: In this paper, an improved and simplified method to design electromagnetic interference (EMI) filters for both dc-dc and ac-dc switching power supplies is introduced, which uses the practical approach of measuring the power supply noise spectrum and using the data to calculate the maximum possible magnitude and minimum possible magnitude of the differential mode and common mode noise impedances.
Abstract: This work introduces an improved and simplified method to design electromagnetic interference (EMI) filters for both dc-dc and ac-dc switching power supplies. This method uses the practical approach of measuring the power supply noise spectrum and using the data to calculate the maximum possible magnitude and minimum possible magnitude of the differential mode and common mode noise impedances. The noise impedance magnitude information aids the design of the EMI filter. Phase information for the noise impedance is not required. In addition, information about the topology and control method of the power supply is not needed. This method solves the limitations of existing EMI filter design methods, which are either too complicated to use, or are based on ideal cases that neglect the noise impedance. The analysis and experimental results show that this method can guarantee that the required attenuation can be achieved, especially at low frequencies.

94 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20241
20233,701
20227,927
20212,733
20202,663
20192,742