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Topology (electrical circuits)

About: Topology (electrical circuits) is a research topic. Over the lifetime, 33316 publications have been published within this topic receiving 397651 citations. The topic is also known as: topology.


Papers
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Journal ArticleDOI
TL;DR: In comparison with the conventional scheme of two separate SISO Cuk converters, good cross regulation is retained while the number of diodes, inductors, and capacitors is reduced in the proposed SIDO Cuk converter.
Abstract: In applications that demand single-input dual-output (SIDO) or dual-input single-output (DISO) dc–dc converters, employing two separate single-input single-output (SISO) converters is a solution. However, the number of components is doubled, resulting in high overall cost. In order to reduce costs, this paper proposes a novel topology synthesis methodology, with which a variety of SIDO and DISO dc–dc converters with reduced components can be derived. The principle of topology synthesis states that integrated SIDO and DISO dc–dc converters can be easily developed from conventional SISO converters by replacing a diode with a basic cell inclusive of additional input/output port. The principle is effective for many SISO dc–dc converters, and as an example, topology synthesis based on buck, boost, buck–boost, Cuk, sepic, and zeta SISO converters is performed in this paper. In order to achieve better understanding of the proposed converters, the integrated SIDO Cuk converter is specifically analyzed and experimentally verified. In comparison with the conventional scheme of two separate SISO Cuk converters, good cross regulation is retained while the number of diodes, inductors, and capacitors is reduced in the proposed SIDO Cuk converter. In addition, zero-voltage-switching operation of one switch is achieved, contributing to lower switching losses. Finally, a prototype circuit with 48-V input and 156 V/1 A, 24 V/4 A outputs is built to validate the theoretical analysis.

92 citations

Proceedings ArticleDOI
11 Dec 2006
TL;DR: In this paper, a general design procedure for the flux-switching permanent magnet (FSPM) machine with different topologies is proposed, including determination of the stator, rotor and magnet dimensions, under the constraints of some dimensions and electrical parameters.
Abstract: In this paper, a general design procedure for the flux-switching permanent magnet (FSPM) machine with different topologies is proposed. Firstly, a 3-phase 12-stator-tooth/10-rotor-pole topology is introduced and its operation principle is described. Then, the basic design method, including determination of the stator, rotor and magnet dimensions, is proposed under the constraints of some dimensions and electrical parameters. The winding turns are obtained by iteratively solving the base-speed and current equations simultaneously. The influence of current density and slot packing factor on the flux-weakening capability is investigated in the design stage to satisfy the torque and wide-speed operation requirement. Further, the output power equation, consequently, the sizing equation is derived for determining the initial dimensions of a FSPM machine, in which the traditional D2 sil a is replaced by D2 sola. Hence, the power density of different topologies can be compared directly by the equation. It reveals that the 3-phase 12/10-pole topology can offer higher power and power density than those of the 2-phase 8/6-pole machine by ~11% in theory under the same conditions. The experiments on the prototype motor verify the performance predictions

92 citations

Journal ArticleDOI
TL;DR: The proposed inverter is able to generate the desired voltage levels using a lower number of circuit devices, including power semiconductor switches and related gate driver circuits of switches, as a result, the total cost is considerably reduced, and the control scheme gets simpler.
Abstract: In this paper, an advanced configuration for a symmetric multilevel voltage source inverter is proposed. The authority of the proposed inverter versus the conventional cascaded H-bridge inverter and those most recently introduced is verified with provided comparisons. The proposed inverter is able to generate the desired voltage levels using a lower number of circuit devices, including power semiconductor switches and related gate driver circuits of switches. As a result, the total cost is considerably reduced, and the control scheme gets simpler. Moreover, the reduced amount of on-state switches in the suggested configuration decreases voltage drops. Furthermore, power losses are diminished. The given simulation results confirm the feasibility of the proposed configuration. To approve the practicability of the proposed inverter, a prototype of the proposed topology has been implemented. Finally, simulation and experimental results are compared, and the provided comparison shows that the obtained results are in good agreement.

92 citations

Proceedings ArticleDOI
01 Oct 2019
TL;DR: This paper focuses on drawing the lane boundaries of complex highways with many lanes that contain topology changes due to forks and merges and forms the problem as inference in a directed acyclic graphical model (DAG), where the nodes of the graph encode geo- metric and topological properties of the local regions of thelane boundaries.
Abstract: One of the fundamental challenges to scale self-driving is being able to create accurate high definition maps (HD maps) with low cost. Current attempts to automate this pro- cess typically focus on simple scenarios, estimate independent maps per frame or do not have the level of precision required by modern self driving vehicles. In contrast, in this paper we focus on drawing the lane boundaries of complex highways with many lanes that contain topology changes due to forks and merges. Towards this goal, we formulate the problem as inference in a directed acyclic graphical model (DAG), where the nodes of the graph encode geo- metric and topological properties of the local regions of the lane boundaries. Since we do not know a priori the topology of the lanes, we also infer the DAG topology (i.e., nodes and edges) for each region. We demonstrate the effectiveness of our approach on two major North American Highways in two different states and show high precision and recall as well as 89% correct topology.

92 citations

01 Sep 2002
TL;DR: In this paper, it was shown empirically that the power transfer distribution factors are relatively insensitive to the operating point and the topology of an electric power system, and the results apply also for more realistic systems with losses.
Abstract: Power transfer distribution factors depend on the operating point and topology of an electric power system. However, it is known empirically that, for a fixed topology, the power transfer distribution factors are relatively insensitive to the operating point. We demonstrate this result theoretically for lossless systems in two ways: as an exact result for a system having series-parallel topology and a single point of injection and a single point of withdrawal and also as an approximate result for systems of arbitrary topology but having reactive compensation sufficient to keep voltages constant at all busses. To the extent that losses are small, the results apply also for more realistic systems with losses. We also analyze two other distribution factors that more closely relate to thermal and steady-state stability constraints.

92 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20241
20233,701
20227,927
20212,733
20202,663
20192,742