Topology (electrical circuits)

About: Topology (electrical circuits) is a research topic. Over the lifetime, 33316 publications have been published within this topic receiving 397651 citations. The topic is also known as: topology.

Current-Mode High Output Impedance Sinusoidal Oscillator Configuration Employing Single FTFN

Abstract: In this study, a general current-mode high output impedance sinusoidal oscillator configuration is proposed. The proposed oscillator configuration uses a single four terminal floating nullor (FTFN), two capacitors and five resistors. The oscillator configuration exhibits high output impedance which makes easy to drive loads without using any buffering devices and provide non-interactive control of oscillation condition and oscillation frequency. The proposed topology also yields single frequency oscillators with reduced number of passive components. All of the proposed oscillators permit good frequency stability and exhibit low active and passive sensitivities. Theoretical analysis is verified with experimental results.

Measurement-Based Estimation of the Power Flow Jacobian Matrix

Abstract: In this paper, we propose a measurement-based method to compute the power flow Jacobian matrix, from which we can infer pertinent information about the system topology in near real-time. A salient feature of our approach is that it readily adapts to changes in system operating point and topology; this is desirable as it provides power system operators with a way to update, as the system evolves, the models used in many reliability analysis tools. The method uses high-speed synchronized voltage and current phasor data collected from phasor measurement units to estimate entries of the Jacobian matrix through linear total least-squares (TLS) estimation. In addition to centralized TLS-based algorithms, we provide distributed alternatives aimed at reducing computational burden. Through numerical case studies, we illustrate the effectiveness of our proposed Jacobian-matrix estimation approach as compared with the conventional model-based one.

Three-phase hybrid multilevel inverter with less power electronic components using space vector

Abstract: This study presents a new design and implementation of a three-phase hybrid multilevel inverter (MLI) using space vector modulation. The proposed MLI consists of a reduced number of dc sources and switches to minimise the control complexity. The developed topology consists of two stages: main stage and auxiliary stage. The main stage is a conventional three-phase inverter with one high-voltage input dc source and six switches. The auxiliary stages contain three individual cells. Each cell consists of two switches and one low-voltage input dc source. This topology is a modular type and without changing the previous connection it can be extended for more number of output voltage levels by adding certain number of auxiliary stages. A space vector modulation control technique has been utilised in order to generate different switching sequences. The special feature of the proposed system is its capability to maximise the number of voltage levels using a reduced number of isolated dc voltage sources and electronic switches. A prototype has been developed and tested for various modulation indexes to verify the control technique and performance of the topology. Experimental results validate the simulation results and the experimental results show a good similarity with the simulation results.

Apparatus and method for discovering a topology for local area networks connected via transparent bridges

Abstract: A system of discovering the active topology of the LANs (local area networks) connected via any apparent bridges that conform to the IEEE 802.1D standard. A discovered active topology of the present invention consists of the active bridges, the LANs and the NMMs (network management modules) that constitute the bridged LAN. The system of the present invention advantageously utilizes the standard (IEEE 802.1D) defined behaviors of transparent bridges to discover the active topology. In so doing, the present invention does not require the bridges to issue any special proprietary frames for development of the active topology. The IEEE 802.1D conforming bridges have the property of forming a path between two conversing end stations. If the two end stations reside in adjacent LANs, the path between these two LANs only has the connecting bridge and no other LAN in between. The present invention utilizes this property in discovering the complete active topology of a bridged LAN via special communications between NMMs located on the LANs. Via cyclic processing and age out functions, the present invention is able to alter the active topology in response to changes within the bridged LAN.

VSC Based D-STATCOM with Selective Harmonic Elimination

Abstract: This paper describes the design, implementation, and performance of a medium-size distribution-type static synchronous compensator (D-STATCOM) with the simplest two-level three-leg voltage-source converter (VSC) topology. Reactive-power control is achieved by phase-shift-angle control, and VSC harmonics are eliminated by selective harmonic elimination method (SHEM). VSC has been designed at the highest low-voltage level of 1 kV and connected to a medium-voltage (MV) bus through a low-pass input filter and Delta/Y-connected MV/1-kV coupling transformer. At the MV side of D-STATCOM, line-current harmonics are minimized to comply with the IEEE Std. 519-1992 for the weakest supply conditions by applying 8-angle TLN2 elimination technique. This necessitates switching the water-cooled high-voltage insulated-gate bipolar transistor (HV-IGBT) modules at 850 Hz, thus eliminating 5th, 7th, 11th, 13th, 17th, 19th, 23rd, and 25th voltage harmonics at the input of VSC. By carefully designing the laminated bus system and selecting minimum stray-inductance dc-link capacitors directly mountable on the laminated bus, stray inductance of the commutation path is brought to a nearly absolute minimum of 60 nH, thus maximizing the utilization of wire-bond single-side cooled HV IGBTs and eliminating the need for resistor-capacitor-diode (RCD) clamping snubbers. The performance of SHEM, together with the phase-shift-angle control, has been tested in the field on a 0-1780-kVAr capacitive 6.3-kV VSC-based D-STATCOM (-750/+900 kVAr VSC) prototype. Field-test results show that SHEM, together with phase-shift-angle control, leads to optimum switching frequency and device utilization for HV IGBTs and high system performance at the expense of slower response as compared to the other known control techniques.