Topology (electrical circuits)

About: Topology (electrical circuits) is a research topic. Over the lifetime, 33316 publications have been published within this topic receiving 397651 citations. The topic is also known as: topology.

High Step-Up DC–DC Converter With Active Switched-Inductor and Passive Switched-Capacitor Networks

Abstract: High-gain voltage conversion is a feature required for several applications, especially for power processing of low-voltage renewable sources in grid-connected systems. In this scope, the presented paper proposes a novel transformerless high gain step-up dc–dc converter based on an active switched-inductor and a passive switched-capacitor networks. The main advantages of the proposed converter are the high voltage gain (>10), the reduced voltage stresses across the switches and the reduced number of components when compared to topologies that provide the same voltage gain using similar principles. The detailed analysis of the proposed converter and a comparison considering other topologies previously published in the literature are also presented in this manuscript. In order to verify the proposed converter performance, a prototype has been built for a power of 200 W, input and output voltages of 20 and 260 V, respectively, and switching frequency of 50 kHz. Experimental results validate the effectiveness of the theoretical analysis proving the satisfactory converter performance, which peak efficiency is around 95.5%.

Generating Statistically Correct Random Topologies for Testing Smart Grid Communication and Control Networks

Abstract: In order to design an efficient communication scheme and examine the efficiency of any networked control architecture in smart grid applications, we need to characterize statistically its information source, namely the power grid itself. Investigating the statistical properties of power grids has the immediate benefit of providing a natural simulation platform, producing a large number of power grid test cases with realistic topologies, with scalable network size, and with realistic electrical parameter settings. The second benefit is that one can start analyzing the performance of decentralized control algorithms over information networks whose topology matches that of the underlying power network and use network scientific approaches to determine analytically if these architectures would scale well. With these motivations, in this paper we study both the topological and electrical characteristics of power grid networks based on a number of synthetic and real-world power systems. The most interesting discoveries include: the power grid is sparsely connected with obvious small-world properties; its nodal degree distribution can be well fitted by a mixture distribution coming from the sum of a truncated geometric random variable and an irregular discrete random variable; the power grid has very distinctive graph spectral density and its algebraic connectivity scales as a power function of the network size; the line impedance has a heavy-tailed distribution, which can be captured quite accurately by a clipped double Pareto lognormal distribution. Based on the discoveries mentioned above, we propose an algorithm that generates random topology power grids featuring the same topology and electrical characteristics found from the real data.

A 90-nm CMOS Threshold-Compensated RF Energy Harvester

Abstract: This paper presents an efficient energy harvester for RF-powered sensor networks. The circuit is based on an improved multi-stage rectifier, which exploits a fully passive threshold self-compensation scheme to overcome the limitation due to the input dead zone. A CAD-oriented design methodology is also proposed, which is aimed at maximizing the overall power conversion efficiency of the harvester through an optimum trade-off among matching losses, power reflection and rectifier efficiency. According to the proposed methodology, a 915-MHz harvester comprising an integrated input matching network and a 17-stage self-compensated rectifier has been designed and fabricated in a 90-nm CMOS technology. The rectifier exhibits a remarkably low input power threshold, as it is able to deliver a 1-V dc output voltage to a capacitive load with a very small input power of -24 dBm (4 μW). When driving a 1-MΩ load, the device can supply a 1.2-V output with an input power of -18.8 dBm (13.1 μW). The achieved results exceed the performance of previously reported RF multi-stage rectifiers in standard analog CMOS technology.

Sensor Networks With Random Links: Topology Design for Distributed Consensus

Abstract: In a sensor network, in practice, the communication among sensors is subject to: 1) errors that can cause failures of links among sensors at random times; 2) costs; and 3) constraints, such as power, data rate, or communication, since sensors and networks operate under scarce resources. The paper studies the problem of designing the topology, i.e., assigning the probabilities of reliable communication among sensors (or of link failures) to maximize the rate of convergence of average consensus, when the link communication costs are taken into account, and there is an overall communication budget constraint. We model the network as a Bernoulli random topology and establish necessary and sufficient conditions for mean square sense (mss) and almost sure (a.s.) convergence of average consensus when network links fail. In particular, a necessary and sufficient condition is for the algebraic connectivity of the mean graph topology to be strictly positive. With these results, we show that the topology design with random link failures, link communication costs, and a communication cost constraint is a constrained convex optimization problem that can be efficiently solved for large networks by semidefinite programming techniques. Simulations demonstrate that the optimal design improves significantly the convergence speed of the consensus algorithm and can achieve the performance of a non-random network at a fraction of the communication cost.