Showing papers on "Total harmonic distortion published in 1990"

Shunt capacitor sizing for radial distribution feeders with distorted substation voltages

Abstract: An algorithm for optimizing shunt capacitor sizes on radial distribution lines with nonsinusoidal substation voltages such that the RMS voltages and their corresponding total harmonic distortion lie within prescribed values is presented. The problem is formulated as a combinatorial optimization problem with inequality constraints. A simple heuristic numerical algorithm that is based on the method of local variations is proposed to determine an optimal solution. An example shows that optimal capacitor sizes found by neglecting the harmonic components may result in unacceptable voltage distortion levels. >

An MOS four-quadrant analog multiplier using simple two-input squaring circuits with source followers

Abstract: An MOS four-quadrant analog multiplier is described. It is based on the square-law dependence of the MOS-transistor drain current on the gate-to-source voltage in the saturation region. One input is applied to the gate directly while the other input is applied to the source through a source-follower buffer stage. The circuit is realized with only 12 MOS transistors and two resistors. The circuit has been fabricated using a metal-gate NMOS process which has separate p-wells to eliminate the substrate bias effect. The multiplier achieves less than 0.45% nonlinearity when the input voltage range is 40% of the supply voltages, and it achieves a -3-dB bandwidth of 30 MHz. The total harmonic distortion is less than 0.6%. The power consumption and chip size are 8 mW and 1.2 mm/sup 2/, respectively. The second-order effects for this type of multiplier are considered in detail. >

Stand alone induction generator with terminal impedance controller and no turbine controls

Abstract: Induction generators with hydraulic turbines are often used for cogeneration The same turbine generator configuration can be used for stand-alone generation if an impedance controller is connected to the generator terminals; this configuration requires no hydraulic controls on the turbine The authors propose an electronic impedance controller to control the voltage and the frequency of a stand-alone induction generator The controller concept and its control range are discussed Particular attention is given to the harmonic distortion caused by the controller and measures to reduce these distortions The controller design is discussed, and data from an experimental generator set are provided to verify the proposed concept >

A rail-to-rail input/output CMOS power amplifier

Abstract: A rail-to-rail amplifier that maintains a high common-mode rejection ratio (CMRR) over the whole common-mode range and has a low harmonic distortion despite the use of relatively small output devices is discussed. The circuit, which measures only 0.3 mm/sup 2/ in a 3- mu m technology, has a quiescent current consumption of 600 mu A and a CMRR larger than 55 dB. It handles up to 4 nF, and can, with a 5-V supply, drive 3.8 V/sub pp/ into 100 Omega (0.1% total harmonic distortion at 10 kHz). >

A 10-b 50-MHz CMOS D/A converter with 75- Omega buffer

Abstract: A 10-b 50-MHz digital-to-analog (D/A) converter for video applications that is based on a dual-ladder resistor string is presented. This approach allows the linearity requirements to be met without the need for selection or trimming. The D/A decoding scheme reduces the glitch energy, and signal-dependent switch signals reduce high-frequency distortion. The output buffer allows driving 1 V/sub pp/ to 75 Omega . The chip consumes 65 mW at maximum clock frequency and a full-swing output signal. The device is processed in a standard 1.6- mu m CMOS process with a single 5-V supply voltage. The double-ladder architecture allows the requirements for small cell area and high linearity to be separated. Compensation techniques have been applied to reduce the second- and third-order distortion components; at 5-MHz signal frequency the total harmonic distortion is -53 dB. >

Derating of induction motors due to waveform distortion

Abstract: The detrimental effects of nonsinusoidal voltage on induction motor performance are described. The derating of induction motors due to harmonic distortion is discussed in detail. Derating of NEMA Design B induction motors of different output ratings and for two types of enclosures (drip-proof and totally enclosed) due to different cases of harmonic distortions are discussed. IEEE Standard 519 suggests that no derating of the motor would be necessary for a harmonic content of up to 5%. However, no limit is specified in regard to the individual harmonic content. The conclusion is that a restriction for the second harmonic should be included on the harmonic distortion limits established by the IEEE Guide for Harmonic Control and React Compensation of Static Pow Converters (ANSI/IEEE Standard 519, Apr. 1981), and derating in some cases should be considered for less than 5% harmonic distortion. Drip-proof machines are found to be less affected by harmonic distortion than totally enclosed machines. Efficiency plays an important role in the degree of derating. Less efficient machines would require a higher derating. It is also clear that smaller machines (less than 5 HP) are affected more by the harmonics than are larger machines. >

Current-feedthrough effects and cancellation techniques in switched-current circuits

Abstract: Distortion due to device mismatches and clock-feedthrough in switched-current circuits is analyzed. A replication-based current feedthrough cancellation technique that reduces the clock-feedthrough current more than 20 dB is proposed. SPICE simulation results for this circuit are given. >

Effect of harmonic distortion in reactive power measurement

Abstract: The authors consider the effect of harmonics on reactive power measurements, and present a novel method for calculating active, reactive apparent, and residual power in nonsinusoidal conditions. The method considers common and uncommon harmonic components of voltage and current waveforms. It properly defines all power components at different harmonic frequencies, such as rotating real power, quadrature power, and the residual power (distortion). Each component is calculated correctly at different frequencies to define its physical meaning. A computer algorithm is developed to calculate all the power components for any distorted voltage and current waveforms. A numerical example is discussed. >

A 10-b 75-MSPS subranging A/D converter with integrated sample and hold

Abstract: The design of a fully differential two-step analog-to-digital converter (ADC) is presented. A sample-and-hold (S/H) circuit based on a unity-gain feedback amplifier, flash ADCs driven by differential resistor ladders, and a differential digital-to-analog converter (DAC) combined with the subtractor are described. The chip has been fabricated in a standard high-speed bipolar process and, by extensively utilizing compensation techniques, achieves +or-1 LSB integral nonlinearity and low harmonic distortion. A 75 Msample/s conversion rate not yet exceeded even by full-flash 10-b ADCs, has been achieved with a power consumption of 2 W. Due to the S/H circuit, the input bandwidth of 250 MHz; the effective resolution of 9 b at 5 MHz exhibits a gradual decrease over input frequency but still remains above 8 b up to 50 MHz. >

Comparison of five different approaches for real time digital feedback control of PWM inverters

Abstract: The five schemes are resistive-load-based deadbeat (DB) control, disturbance-observer-based DB control I. disturbance-observer-based DB control II, internal-model-principle-based pole placement, and digital proportional-integral (PI) control. The control schemes are applicable to single-phase and three-phase balanced-load inverter systems because the balanced three-phase system can be converted to two decoupled single phase systems. The modification of the control law from a single-phase to a three-phase system is explained. Simulations were performed in both systems, and experiments were carried out in the three-phase PWM inverter system. The disturbance-observer-based I and the digital PI control schemes yielded the best overall performance. The former is better in terms of total harmonic distortion for a nonlinear load, but the latter is based on a much simpler algorithm. >

Measurement of harmonic distortion in microwave photodetectors

Abstract: The use of an offset phase-lock heterodyne system with a large dynamic range (>110 dB) for measuring photodetector (PD) harmonic distortion out to microwave frequencies is discussed. Up to 40 harmonics and second-harmonic levels only 17.8 dB below the fundamental were observed in high-speed PDs with only 1.7 mW incident. Measurements of harmonic power versus incident optical power are reported, along with associated PD bandwidth reduction. >

A fully differential CMOS line driver for ISDN

Abstract: A CMOS differential buffer amplifier for ISDN applications is discussed. The chip operates from a single 5-V power supply and can deliver a 6-V (peak-to-peak), 80 kHz signal into a load of 100 Omega and/or 300 pF with a total harmonic distortion (THD) of about 0.25%. The amplifier's main feature is its power supply rejection ratio, which remains practically constant at -75 dB from DC to several hundred kilohertz for both positive and negative supplies with the common-mode voltage generated on chip. In an inverting configuration with a gain of 1.5, the 1% setting time for step input is less than 500 ns for a step of 1.5 V and less than 1 mu s for a step of 6 V (for both cases, the output load is 100 Omega and 300 pF). By using relatively small devices for the output stage, the amplifier occupies an area of only 1400 mil/sup 2/ in a 2- mu m double-poly single-metal n-well CMOS technology. >

Effect of waveform distortion on protective relays

Abstract: The authors attempt to show, theoretically and by laboratory tests, the influence of harmonics on protective relays. Representative relays using various operating principles were tested using fundamental currents and/or voltages. They were then tested using single-frequency inputs that were multiples of the fundamental frequency. Finally, tests were made using realistic combinations of fundamental and harmonics. From the theoretical concepts and expectations discussed and the series of tests performed, it is evident that the influence of mixed frequency harmonics (with magnitude decreasing with order) on the steady state behavior of the protective relays studied is minor and insignificant. The influence of pure single-frequency inputs, above the fundamental, on various protective relays was also evaluated. Results showed a distinct change in relay operation. >

A novel CMOS linear transconductance cell for continuous-time filters

Abstract: A novel tunable transconductance cell with extended linearity is described. It is based on the use of the transconductance of an MOS transistor operated in the triode region. High linearity of the cell is achieved by maintaining both drain-to-source and source-to-body voltages of the transistor constant by means of a very simple feedback loop. The tuning of the transconductance cell is obtained by adjusting the current delivered by a current source. The cell also provides high operation speed. The circuit is suitable for the design of high-performance, high-frequency, continuous-time filters. It is shown that, when the cell is used in a fully differential configuration, harmonic distortion as low as 0.3% can be achieved for processed signals with a peak amplitude of 3 V. >

The implementation of a digital sine wave oscillator using the TMS320C25: distortion reduction and applications

Abstract: The implementation of a digital sine wave oscillator using the TMS320C25 digital signal processor (DSP) is described. The system is implemented with the Dalanco Spry model 25 DSP board, and a software system is designed whereby an IBM PC host computer provides control of the waveform generator functions and parameters. Waveforms are generated using the lookup-table (LUT) method. The methods of direct LUT and linear interpolation of missing samples are implemented and compared with a method that uses a trigonometric identity to reduce the harmonic distortion of the sine wave by effectively increasing the table length of the direct LUT method. The results of an experiment performed in the digital domain are presented without consideration of the problem of analog reconstruction. The oscillator can produce a sine wave without the nonuniform sampling distortion associated with fractional addressing, over the range of 7.2 Hz to 58.8 kHz, with a resolution of 7.2 Hz using 384 data words. The trigonometric identity method uses less data memory than other methods for the same distortion levels. Waveforms for the sum of two sine waves, a frequency swept sine wave, amplitude modulation (AM), and frequency modulation (FM) signals are shown as applications of the waveform generator. >

Generation and cancellation of second-order harmonic distortion in analog optical systems by interferometric FM-AM conversion

Abstract: The generation of strong harmonic distortion from interferometric FM-AM conversion in analog lightwave systems is demonstrated both theoretically and experimentally. The effect results from the combined effects of wavelength chirping of the laser coupled with the nonlinear transmission characteristics of a dispersive element in the optical beam path. It is shown that reflections as small as 2-10/sup -4/ will result in second-order distortion as large as -65 dBc. The effect can also be used to cancel any laser- or detector-induced harmonic distortion. In one example, the -36 dBc second-order distortion in a distributed-feedback (DFB) laser is improved to better than -70 dBc. >

Measurement and characterization of harmonic and high frequency distortion for a large industrial load

Abstract: A software package is described that was developed to perform harmonic analysis on digitized current and voltage waveforms. The authors also report on the measurement and characterization of voltage and current harmonics and high-frequency distortion of a large industrial load. Since waveform distortions often include periodic high-frequency transients, special signal processing techniques were developed in the software to alleviate misleading results of the calculated harmonics. From simultaneous measurements on all three phases, an investigation of harmonic unbalance at the industrial load is discussed. Problems with the installation of a capacitor bank for voltage regulation purposes are also described. >

Measurements and modeling of the harmonic distortion in InGaAsP distributed feedback lasers

Abstract: Measurements of the second harmonic distortion in 1.3 mu m InGaAsP distributed feedback lasers are reported. At low modulation frequencies ( approximately 50 MHz), the second harmonic distortion exhibits a minimum at a certain bias current. The minimum, in general, is not observed at high modulation frequencies ( approximately 1 GHz). A model of the harmonic distortion, based on the equivalent electrical circuit of the laser, is presented to explain the observed behavior. The spatial hole burning effect in the active region introduces additional nonlinearity, its effects can be significant compared to that of the leakage path. >

Low-noise, low-distortion CMOS AM wide-band amplifiers matching a capacitive source

Abstract: A low-noise, low-distortion AM wideband CMOS amplifier that matches a capacitive antenna is presented. The amplifier uses a single-ended input stage to realize optimal noise matching with a capacitive source of 75 pF. The equivalent input noise voltage is as low as 0.7 mu V/sub rms/ within 2.5-kHz IF (intermediate frequency) bandwidth. A differential symmetrical class-AB output stage is optimized to large-scale signal distortion performance. With an 8-V single-power supply the amplifier is capable of driving a 7-V/sub pp//1-MHz signal into a 400- Omega load with a total harmonic distortion of 2%. A very high dynamic range of 130 dB has thus been achieved. An intermodulation-free dynamic range up to 96 dB and an IM3 intercept of 18 V/sub pp/ have been measured. The amplifier is fabricated in a standard 3- mu m n-well CMOS technology. Design details concerning noise, distortion, and stability performance are analytically described. >

Fully-integrated 5 to 15 MHz programmable bipolar Bessel lowpass filter

Abstract: Design and experimental verification of a fully differential monolithic bipolar seventh-order Bessel lowpass filter are presented. The transconductance-C filter is unique in its dual emphasis on magnitude and constant group delay characteristics. Its pole frequency f/sub c/ is current tunable between 5 and 15 MHz. The circuit also incorporates user programmable equalization. Measured group delay variation with and without equalization is less than 1 ns between DC and 1.5 f/sub c/. With 5-V operation and 2-V/sub pp/ input signal, the total harmonic distortion is less than 1%. The filter is primarily targeted at high-performance disk drives and constant density recording applications. Its design generality and excellent high-frequency performance show great promise for other future applications, potentially up to 100 MHz. >

Distributed feedback laser diode and module for CATV systems

Abstract: Harmonic distortion of distributed feedback laser diodes (DFB-LDs) for analog transmission systems is investigated. It is shown that, under a modulation frequency of less than 1 GHz, the harmonic distortion depends on the nonlinearity of the light output power-current (P-I) curve under the continuous wave (CW) condition, which is determined by the coupling constant kappa L, and that the distortion can be minimized at kappa L approximately 1. A 1.3 mu m wavelength InGaAsP DFB-PPIBH (p-substrate partially inverted buried heterostructure) LD and its module, with low distortion by the control of a coupling constant, have been developed. >

Erbium-doped fiber amplifier for video distribution networks

Abstract: The possibility of an application of Er-doped fiber amplifiers to AM-FDM (frequency division multiplexing) or FM-FDM video distribution networks is discussed. The measured noise and modulation distortion properties of ER-doped fiber amplifiers are good enough to meet even the severe quality standards set for trunk lines. A carrier-to-noise ratio (CNR) of 57 dB for an AM-FDM transmission was measured. A second-order harmonic distortion (HD2) of less than -56 dB was measured by the monotone method (modulation depth m=50%), and a cross modulation distortion (XM) of less than -63 dB was measured by the two-tone method (m=25%*channel). On the basis of these values, composite second-order distortion (CSO) and XM in a 40-channel transmission were estimated as less than -57 dB and -73 dB, respectively. Significant reduction of noise and modulation distortion is made possible by optimizing the length of Er-doped fiber amplifiers and using input- and output-port isolators. >

Interferometric devices for reducing harmonic distortions in laser communication systems

Abstract: In an optical communication system, in order to reduce simultaneously both second and third harmonic distortion in a light beam (11) from a modulated semiconductor laser (10), a nonlinear interferometric device (12)--such as a Fabry-­Perot etalon--is inserted in the path of the beam. The parameters of the interterometric device--such as its phase or finesse or both--are selected such that, for example, for a suitable laser bias current, the second harmonic distortion or both the second and third harmonic distortion produced by nonlinearities of the laser (plus nonlinearities of the transmission medium such as an optical fiber, if any, through which the beam propagates from source to receiver) are significantly compensated by nonlinearities of the interferometric device.

A CMOS-Readout-Amplifier For Instrumentation Applications

Abstract: In the recent years enormous progress has been made in integration of sensors and electronics on the same silicon substrate. So a strong demand for incorporated instrumentation amplifiers has arisen. In this paper we present a fully integrated CMOS version of such an amplifier using switched capacitor techniques. The amplifier system provides differential input capability, programmable amplification, clock generation, and low-pass filtering on the chip. The output signal is continuous in time and the system can be used without any special precautions necessary for sampled-data circuits. Emphasis was laid on high PSRR, low noise and offset, low harmonic distortion, and small amplification error. For covering a large field of applications only slightly different realizations can be used for capacitive sensors as well as for resitive sensor bridges.

Symbolic simulation of harmonic distortion in analog integrated circuits with weak nonlinearities

Abstract: A method for the symbolic calculation of harmonic distortion in weakly nonlinear, continuous-time analog integrated circuits is presented. The method is based upon a simplified approach to Volterra series in the frequency domain. It is built into an already existing symbolic simulator for linear characteristics of analog circuit, called ISAAC. Symbolic expressions for the second and third harmonic and for the harmonic distortion are generated as a function of the fundamental frequency and the symbolic circuit parameters. For large circuits, simplified expressions are derived using an approximation method. In this way, the major contributions to the harmonic distortion can be identified, providing insight into the nonlinear behavior of analog circuits. >

Switching power apparatus with 3-state driver

Abstract: The switching power apparatus has high efficiency, high reliability and very small number of components. A power transformer is used if line isolation is necessary. The apparatus is operable with almost any configuration comprising at least one bidirectional or two unidirectional switches for producing AC or DC outupt signal. The switching is minimized with increasing output signal level as to maximize the efficiency but with no significant deterioration of the harmonic distortion level. A resistor divider provides two feedback signals in response to the output signal. Two comparators compare the input signal against the feedback signals and provide two comparison signals. Two flip-flops temporarily store the comparison signals. A switching amplifier provides the output signal in response to the comparison signals stored in the flip-flops. If output signal correction is unnecessary, the switching amplifier is in idle state.

Effects of modeling on the accuracy of harmonic analysis

Abstract: Electronic switching in AC/DC converters generate harmonics. The level of the harmonics depends on the interaction of the interconnected AC and DC systems. In analysis methods for computing harmonic levels, the modeling of the AC power system and its effect on the computed harmonic spectrum, and the convergence of the solution method have not been adequately researched. A method which addresses these issues is proposed. The method is used to show that the choice of the AC system model is very critical since the harmonic distortion at the interface bus is the result of an interaction between the converter and the AC-system. The method consists of a comprehensive model of a converter substation, the AC power system, and the DC-system equivalent. A solution algorithm based on Newton's method is proposed with improved convergence characteristics. A parametric study is presented to illustrate the effects of the AC power system model and the converter control system on the harmonic generation. >

Effect of voltage harmonics on the operation of solid state relays in industrial applications

Abstract: The results of a study on the effects of voltage and current harmonics on the operation of four types of solid-state relays (SSRs) used in control schemes of many industrial applications are presented. This study started after repeated malfunctions of electrophotographic printers in some data processing centers. The misoperation of zero-switching SSRs was suspected as the cause of the malfunction. Tests on the SSRs were performed using a single-phase harmonic generator and a LeCroy digital oscilloscope with signal processing software capabilities. The results reported indicate that voltage harmonic distortion may cause a delay in the turn-on time of more than a cycle. In some cases, complete failure to turn on or off may occur. Recommendations based on academic research, user's experience, and manufacturers viewpoints are given. >

A very linear BiCMOS transconductor for high-frequency filtering applications

Abstract: A differential transconductance stage implemented in BiCMOS technology is described. The key features of the new stage are: (1) a total harmonic distortion (THD) less than 0.15% up to a 3 V/sub pp/ differential input signal, assuming 2% mismatch of the input devices, with a 5-V supply; (2) a second pole frequency typically higher than 2 GHz; and (3) a gain of more than 50 dB. All of these features are obtained from simulations performed using SPICE and correspond to a BiCMOS process featuring 2- mu m minimum channel length and 7-GHz bipolar f/sub T/. The structure of the transconductance is described and its operation explained. The nonidealities of the stage, like distortion, finite gain, parasitic poles, noise, and offset, are discussed. The complete implementation is presented. The simulated performance of a bandpass filter based on the new transconductor is reported. The results demonstrate that using the new circuit a filter centered around 5 MHz with a Q of 22 should result in a Q precision better than 12% without any Q tuning. >

Very linear CMOS floating resistor

Abstract: A very linear CMOS floating resistor is introduced. The proposed topology takes advantage of the MOS transistor characteristics biased in the linear region. It is claimed that the resistor linearity can be improved by reducing the AC voltage swing in the transistor terminals, the drain and the source, and using the linear behaviour between the gate voltage and the drain current. Simulated results, even in the presence of large transistors mismatches, have shown that the total harmonic distortion (THD) is lower than 0.1% for applied voltages up to 2 V peak to peak, VPTP. Resistance values of 500Ω and a frequency response up to 10MHz have been simulated in a typical 3 =m CMOS process. The supply voltages was only ± 2.5 V.