Showing papers on "Total harmonic distortion published in 1992"

An inherently linear and compact MOST-only current division technique

Abstract: A technique is presented that uses the same MOS transistors for both division and switching functions, eliminating resistors or capacitors. Although an MOS-transistor exhibits a nonlinear relation between the current and voltage (even in the linear region), it is shown that the current division is inherently linear. The most important measurement results are shown. The dynamic range in the audio-band (0-20 kHz) is 103 dB with respect to a maximum input signal of 1 V/sub rms/. At 1 V/sub rms/, THD is below -80 dB over the audio band and below -85 dB under 3 kHz. As the unity-gain frequency of the opamps is 4.5 MHz, the bandwidth of the circuit is limited to 1.5 MHz. Attenuation accuracy is better than 0.15 dB up to -48 dB and better than 0.4 dB over the entire attenuation range. >

On continuous control of PWM inverters in the overmodulation range including the six-step mode

Abstract: The power output and the dynamic performance of pulse width modulation (PWM)-controlled AC motor drives can be improved by increasing the inverter output voltage through overmodulation. Two different solutions are proposed to increase the output voltage in a continuously controllable fashion up to the maximum possible value, which is reached in the six-step mode. The solutions differ in their approach. A space vector strategy is used for high dynamics performance high switching frequency drives, while a field-oriented PWM method is used for low switching frequency high power inverters. The methods are described and analyzed, and experimental results are presented. >

Multibit Sigma - Delta A/D converter incorporating a novel class of dynamic element matching techniques

Abstract: A dynamic element matching technique is applied to multibit sigma-delta modulators. The approach translates the harmonic distortion components of a nonideal digital-to-analog converter (DAC) in the feedback loop of a sigma-delta modulator to high-frequency components, which can then be filtered out by the decimation filter. Computer simulations have confirmed that with this approach a third-order sigma-delta modulator employing a 3-bit forward ADC, a 3-bit feedback DAC with a random mismatch of 0.1% can achieve a 104-dB (17+bit) dynamic range and a harmonic distortion below 100 dB, with an oversampling ratio of 64. The technique does not generate any tone in the passband. >

Digital-domain calibration of multistep analog-to-digital converters

Abstract: A digital-domain self-calibration technique, which can directly measure and cancel code errors in multistep conversions, is developed to improve the linearity of multi-step analog-to-digital converters (ADCs). While conventional self-calibration techniques require separate digital-to-analog converters (DACs) for calibration purpose to subtract nonlinearity errors in the analog domain, the proposed digital calibration technique uses add-on digital logic to subtract nonlinearity errors digitally from uncalibrated digital outputs. In a prototype 12-b fully differential two-step ADC implemented using a 2- mu m n-well CMOS technology, this technique cancels MOS switch feedthrough, op-amp offsets, and interstage gain errors simultaneously, and improves total harmonic distortion from -64 to -77 dB. >

A CMOS 13-b cyclic RSD A/D converter

Abstract: A 13-b CMOS cyclic A/D converter that does not need trimming nor digital calibration is presented. The effects associated with the error on the gain factor 2 as well as the offset errors are corrected by taking full advantage of the redundant signed digit (RSD) principle. The gain error resulting from mismatches among switched capacitors is corrected by a novel strategy that implements an exact multiplication by four after two cycles. As a result, offset errors do not affect the integral or the differential linearities from the RSD algorithm. The remaining overall shift caused by offsets is reduced under the LSB level by a proper choice of capacitor switching sequence. The converter achieves 1/2 LSB integral and differential linearity at 25 kS/s; harmonic distortion is less than -83 dB. Chip area is 2.9 mm2 in a standard CMOS 3-mu-m technology, including control logic and the serial-to-parallel output shift register. Power consumption is 45 mW under +/-5-V supplies.

The application of network objective functions for actively minimizing the impact of voltage harmonics in power systems

Abstract: The impact of voltage harmonics on a power system can be minimized by using active filters to inject distortion-canceling currents. However, a network objective function must be specified before the optimum filter injection currents can be determined. The authors illustrate the application of a distortion-minimizing procedure with each of the following four network correction strategies, total harmonic voltage distortion, telephone influence factor, motor load-loss function, and single-bus sine wave correction. It is also pointed out that, as with any active device, care must be taken when sitting and controlling an APLC (active power line conditioner) to ensure maximum improvement in network distortion. If a network approach is not used, a poorly located APLC could have an overall negative impact. >

Tunable BiCMOS continuous-time filter for high-frequency applications

Abstract: A BiCMOS fully differential transconductor based on MOS transistors operating in the linear region is presented. The circuit has an equivalent nondominant pole located above 1.5 GHz. This makes it suitable for high-frequency continuous-time filters. A second-order low-pass filter using the new transconductor realized in a 2- mu m BiCMOS technology is reported. The cutoff frequency f/sub 0/ of the cell is tunable in the range of 8-32 MHz and the quality factor is 2. The filter THD stays lower than -40 dB for an output signal up to 3.2 V/sub p-p/ at 5-MHz frequency. The area of the cell is 0.322 mm/sup 2/ and the power consumption (with f/sub 0/=25 MHz) is 30 mW with a single 5-V power supply. >

Design of a bipolar 10-MHz programmable continuous-time 0.05 degrees equiripple linear phase filter

Abstract: A bipolar seventh-order 0.05 degrees equiripple linear phase (constant group delay) transconductance-capacitor (g/sub m/-C) low-pass filter with a cutoff frequency (f/sub c/) tunable between 2 and 10 MHz is presented. Programmable equalization up to 9 dB at f/sub c/ is also provided. Total harmonic distortion at 2 V/sub p-p/ is less than 1%, with a dynamic range equal to 49 dB. Nominal power consumption from a single 5-V supply is 135 mW. The circuit also has a low-power mode ( >

Third-harmonic modulated power electronics interface with three-phase utility to provide a regulated DC output and to minimize line-current harmonics

Abstract: A novel approach to achieving nearly sinusoidal line current rectification of three-phase utility voltages is presented. The scheme incorporates two step-up DC-DC power converters to modulate the DC link currents at the third harmonic frequency. The modulated currents are then reinjected on the AC side of the diode bridge rectifier. Simulation results for a three-phase, 208 V (line-to-line), 3 kW system are presented. The sensitivity of the interface to unbalances in various system parameters is included. Results from experimental investigations on a small-scale laboratory model are presented. >

Evaluation of reactive power meters in the presence of high harmonic distortion

Abstract: Four reactive power meters, operating on different principles, were tested under nonsinusoidal conditions. Different definitions of the reactive power are discussed. Because the definition and meaning of the nonsinusoidal reactive power are still being actively debated, the readings of the tested meters were compared with four nonsinusoidal reactive powers and the first harmonic reactive power, to verify whether these readings can be interpreted as approximate measures of the different definitions. A digital instrument, programmed to measure each of these powers, was used as a reference. >

'Dead-band' PWM switching patterns

Abstract: Reference/modulating waveform continuity is not a necessary condition for the implementation of switching patterns for three-phase pulse-width modulated (PWM) converters if the load or the source are Y-connected. This is based on the fact that the converter phase-voltages do not need to be sinusoidal and switching pattern discontinuities-"dead-bands"-do not degrade the quality of output/input voltage/current waveforms by introducing low-order harmonics if certain parameters are optimized. This paper discusses general characteristics of various discontinuous switching patterns for PWM converters and shows that they can yield better performance than their continuous counterparts in some operating regions. Performance is defined as harmonic distortion normalized with respect to effective switching frequency and serves as a measure of comparison with continuous PWM techniques, The applications considered include general purpose and application specific solid-state power supplies using voltage source inverters and PWM rectifiers. Theoretical considerations are verified on an experimental unit.

The trajectory tracking approach-a new method for minimum distortion PWM in dynamic high-power drives

Abstract: Feedforward pulsewidth modulators generate volt/spl middot/second differences between the controlling reference signal and the switched output waveform during transient operation. This dynamic modulation error is particularly pronounced at low switching frequency, e.g. with modern high-power GTO inverters. The compensation of this error is a key requirement when designing an optimal pulsewidth modulator for these applications. The trajectory tracking approach uses the steady-state trajectories of the current vector, computed from the optimal switching sequences, as templates. A tracking controller counteracts if the actual current vector deviates from this given path at transient operation. A decomposition of the current vector trajectory into its components enables, in addition, the identification of the instantaneous fundamental current, permitting the implementation of a fast current control system. Oscillograms from a 30 kW model induction motor drive demonstrate the high quality in terms of dynamic performance and minimum harmonic distortion obtained with a three-level inverter at only 200 Hz switching frequency. >

Power factor, harmonic distortion; causes, effects and considerations

Abstract: Power factor has increasingly become a topic of discussion when specifying loads and AC/DC or AC/AC power sources. The European community has proposed standards for limiting the mains current distortion caused by nonlinear loads. A brief overview of emerging standards is provided. The definition of power factor and the difference between displacement and distortion power factor are explained. The effects of low power factor are discussed, with emphasis on nonlinear loads such as switch mode rectifiers. A basic explanation of total harmonic distortion (THD) is provided along with a discussion of sources of current distortion, the effects on power distribution equipment, heating effects on transformers and the effects on other loads connected to the network. The relationship between power factor and harmonic distortion is discussed. Harmonic distortion is the parameter best representing a figure of merit in defining power line and load quality for nonlinear loads. >

Harmonic distortion caused by capacitors implemented with MOSFET gates

Abstract: The capacitive gate structures available in digital-oriented CMOS processes are reviewed, with emphasis on their use as linear capacitors. It is shown that the voltage harmonic distortion in MOS gate capacitors biased in either accumulation or strong inversion is almost technology independent. Experimental and analytical results indicate that the total harmonic distortion in an adequately biased (2.5 V) gate capacitor can be kept low (THD >

Harmonic filtering for the offshore industry

Abstract: The application of a large number of adjustable speed drives (ASDs) operating electric submersible pumps (ESPs) on two separate offshore platforms, connected to a limited electrical power system on a tanker feeding power to the platforms via subsea power cables, presents technical problems involving high levels of harmonic distortions that experience shows can impact the overall system reliability. Such a system is described and discussed in detail and practical solutions to the problems are illustrated. The design of the harmonic filters are shown to have a major impact on the overall operation of the power system. >

A digital multifunction protective relay

Abstract: The author describes the development of a digital multifunction relay for the protection of the intertie between a customer-owned generator and a utility system. The relay uses state-of-the-art digital signal processing techniques to measure the relay parameters, thereby eliminating analog hardware. The hardware design uses a dual microprocessor architecture to achieve flexibility and high speed operation. The relay uses the DFT (discrete Fourier transform) to obtain the fundamental frequency phasor measurements, and hence the frequency and power related functions are immune to harmonic distortion in the voltage and current signals. In addition to costing less than the existing package of single function relays, the relay also provides improved performance, user friendly human interface, remote communication, self-checking, and self-calibration functions. >

Harmonic filter design using actual recorded data

Abstract: This work presents a study of a harmonic filter design that minimizes harmonic distortion caused by harmonic sources such as drives. Several types of shunt harmonic filters are presented. The analysis includes the basic principles, the application of the Z-bus method and the economic aspects affecting the harmonic filter design. Offline steady state simulation programs, namely, V-HARM and HARMFLO, are used to model loads, to study variation of the harmonics, and to evaluate the effect of harmonic filters at various buses in the system. Several existing utility systems are used as test cases to check the performance of the filter. The major objectives in this study are (i) to improve the power factor, (ii) to reduce current and voltage distortion to standard limits, and (iii) to reduce resonance problems at other buses, if any. The transient analysis of harmonic filters using the Electromagnetic Transients Program (EMTP), which is essential to determine proper ratings of the filter components, is also reported. >

Performance analysis of three-phase inverters controlled by synchronous delta-modulation systems

Abstract: Synchronous delta-modulation systems are used to control resonant voltage link inverters, where switching has to be synchronized with the zero crossings of the link voltage. This paper shows that output current harmonic distortion and average switching frequency of such systems can be calculated analytically in spite of the quasistochastic behavior of the modulators output. Under the assumption of constant link frequency and large ratio of link to output frequency, results are derived for three-phase sigma-delta modulation, space-vector based sigma-delta modulation, and current-regulated delta modulation. The results hold for any shape of the inverter input voltage (including DC). The output current harmonic distortion of resonant link inverters is compared with conventional hard switching PWM inverters. >

Generation, design and tuning of OTA-C high frequency sinusoidal oscillators

Abstract: A systematic approach to derive practical CMOS sinusoidal oscillators is presented. A general topology is given to implement sinusoidal oscillators by using operational transconductance amplifier capacitor (OTA-C) techniques. To illustrate the proposed approach five different structures are presented from this general topology and analysed, taking into account the CMOS OTAs dominant non-idealities. Building blocks are presented for amplitude control, both by automatic gain control (AGC) schemes and by limitation schemes. Experimental results from 3 μm and 2 μm CMOS (MOSIS) prototypes showing oscillation frequencies up to 69 MHz are included. The amplitudes can be adjusted between 1 V peak-to-peak and 100 mV peak-to-peak. Total harmonic distortions (THD) from 2.8% down to 0.2% have been experimentally measured in the laboratory. A frequency tuning loop for these structures is introduced that provides a precise, temperature and parasitic independent frequency-to-voltage relationship. Experimental results for the tuning loop are presented.

Harmonics and transient overvoltages due to capacitor switching

Abstract: This work presents a study of the steady-state and transient effects of power factor correction capacitors on the utility and on the customer. In the presence of harmonic-producing loads, capacitors used for power factor correction can cause parallel or series resonance problems which tend to increase the total harmonic distortion (THD) of the voltage and current waveforms. The cases studied in this work considers the addition of a power factor correction capacitor, in the presence of downstream harmonic loads and at the harmonic load site. In both cases the resonance created by the addition of the capacitor caused the harmonic distortion of the voltage and current waveforms to increase. Another problem is transient overvoltages created by switching the capacitor. A case study is reported where the operation of a semiconductor controlled motor drive is effected by transient overvoltages. >

Bias servo loop for magneto-resistive read/write head

Abstract: A bias current servo loop for a magneto-resistive recording head detects distortion in the read signal from the MR head, and adjusts the operating point for the head to minimize the distortion. The distortion is detected by monitoring the second harmonic of a digitized sample of the read signal. A running average of the digitized amplitude of the second harmonic is generated by a digital bandpass filter. The root mean square of the running average of the digitized amplitude of the second harmonic is estimated. The estimated RMS value is compared against a reference value indicative of minimum distortion and the difference between the estimated RMS value and the reference value is used to adjust the bias current.

A time-domain three-phase power system impedance modeling approach for harmonic filter analysis

Abstract: A time-domain method for impedance modeling of an unbalanced, three-phase power transmission and distribution network using three-phase measurements of bus voltage and injected current waveforms is presented. An impedance model seen at a bus where a harmonic filter is to be installed is calculated for each harmonic frequency, and the effect of placing the filter at the bus is then analyzed at these frequencies. As the configuration or operating condition of the power system varies, the estimated model changes accordingly, provided updated measurements are available. Hence, the effect of the harmonic filter under different system configurations or operating conditions is analyzed, and the information from this analysis is used for online harmonic filter control. Impedance models estimated by the proposed method are applied in filter design and performance analysis with actual recorded data, and the results are presented. >

Highly fault tolerant active power line conditioner

Abstract: An improved active power line conditioner is disclosed. The active power line conditioner includes a series inverter coupled to an energy input source, and a parallel inverter coupled to a non-linear load. The non-linear load is powered by a load current which includes fundamental components and harmonic components. An energy storage element is electrically connected between the series inverter and the parallel inverter. The parallel inverter is used for current control functions, while the series inverter is used for instantaneous output voltage regulation. In one embodiment of the invention, a parallel current limiter is used for the parallel inverter. The parallel current limiter is fixed to satisfy specified output voltage total harmonic distortion requirements or peak to rms output current ratios in the active power line conditioner. A series current limiter may be used for the series inverter. The series current limiter is set slightly above the peak of the active power line conditioner input current fundamental. This allows the onset of a small intentional peak output voltage distortion that in turn limits excessive nonlinear load peak currents without back feeding of current harmonics into the input supply of the active power line conditioner.

Generalised modelling of power transformers in the harmonic domain

Abstract: The periodic nonlinear behavior of a multilimb three-phase transformer is modeled in the harmonic domain, a frame of reference which allows cross-couplings between phases and between harmonics to be explicitly represented The magnetic equivalent circuit is derived from the individual magnetizing characteristics of the core branches The linearized transformer model, in the form of a harmonic Norton equivalent, is combined with the linear part of the electric network, and solved using a unified iterative procedure The numerical solution involves a Newton-type iterative algorithm and a novel sparsity-oriented hybrid technique Use of the proposed model in a practical transmission system has shown that the harmonic distortion caused by individual and multilimb core transformers is very different, with noticeable reduction in the multilimb case >

Optimization of a novel DC-link current modulated interface with 3-phase utility systems to minimize line current harmonics

Abstract: A novel three-phase utility interface is discussed. The interface draws near-sinusoidal currents from the utility and provides a regulated DC output voltage. The performance of the system is optimized. Simulation results for a three-phase, 208 V (line-to-line), 3 kW system are presented. The sensitivity of the interface to unbalances in various system parameters is examined. Simulation results indicate that a total harmonic distortion in the line currents lower than 5% can be achieved by the interface. It is shown that there is minimal degradation of performance with changes in system parameters. >

New CMOS linear transconductor

Abstract: A new transconductor is proposed which uses a bias feedback technique and has a simple configuration and a good high-frequency performance. The proposed transconductor is tunable by adjusting the bias current, and suitable for application to highly linear continuous-time filters. Experimental results show that the total harmonic distortion (THD) of the output current is less than 1% for the differential/singleended input signals of up to 6.0 V/4.3 V (peak-to-peak) when the supply voltages are ±5 V.

Control system using harmonic filters

Abstract: A harmonic filter for active or adaptive noise attenuation control systems for obtaining the complex amplitude of a single harmonic component from a signal which contains one or more harmonic components.

Current regulator for a four-legged three-phase inverter

Abstract: A current regulator for a four-legged, three-phase inverter determines the next optimal, or near-optimal, inverter state in a relatively short time period based on phase current error signals and back-emf's, resulting in low harmonic distortion, reduced current ripple, minimal current stresses, and increased utilization of the available dc bus voltage over a high bandwidth.

A single phase to three phase power converter for motor drive applications

Abstract: A simple and low-cost converter topology for driving a three-phase motor load from a single-phase AC power supply is presented. Using only two active devices with roughly one p.u. current rating, the converter can retain nearly full starting torque during motor starting with one extra capacitor and supply excellent balanced output voltage to the motor under steady-state conditions. Under positive sequence operation, the converter has no low-frequency output harmonic distortion, high total input power factor, and reasonable input current distortion. The fundamental frequency model for the system, harmonic distortion on the motor side and the input AC line side, the rating/stress for devices, reactive component selection, and the control strategies for starting and steady-state operation are detailed. Analytical, simulation, and experimental results are presented. >