Showing papers on "Total harmonic distortion published in 2006"

Polyharmonic distortion modeling

Abstract: For more than a quarter of a century, microwave engineers have had the benefit of a foundation of mutually interacting components of measurement, modeling, and simulation to design and test linear components and systems. S-parameters are perhaps the most successful behavioral models ever. They have the powerful property that the S-parameters of individual components are sufficient to determine the S-parameters of any combination of those components. S-parameters of a component are sufficient to predict its response to any signal, provided only that the signal is of sufficiently small amplitude. We have presented the PHD modeling approach. It is a black-box frequency-domain model that provides a foundation for measurement, modeling, and simulation of driven nonlinear systems. The PHD model is very accurate for a wide variety of nonlinear characteristics, including compression, AM-PM, harmonics, load-pull, and time-domain waveforms. The PHD model faithfully represents driven nonlinear systems with mismatches at both the fundamental and harmonics. This enables the accurate simulation of distortion through cascaded chains of nonlinear components, thus providing key new design verification capabilities for RF and microwave modules and subsystems

Active harmonic elimination for multilevel converters

Abstract: This paper presents an active harmonic elimination method to eliminate any number of specific higher order harmonics of multilevel converters with equal or unequal dc voltages. First, resultant theory is applied to transcendental equations characterizing the harmonic content to eliminate low order harmonics and to determine switching angles for the fundamental frequency switching scheme and a unipolar switching scheme. Next, the residual higher order harmonics are computed and subtracted from the original voltage waveform to eliminate them. The simulation results show that the method can effectively eliminate the specific harmonics, and a low total harmonic distortion (THD) near sine wave is produced. An experimental 11-level H-bridge multilevel converter with a field programmable gate array controller is employed to implement the method. The experimental results show that the method does effectively eliminate any number of specific harmonics, and the output voltage waveform has low THD.

An improved control strategy for grid-connected voltage source inverters with a LCL filter

Abstract: This paper proposes a novel control strategy for grid-connected voltage source inverters (VSI) with an LCL-filter. The strategy "split" the capacitor of LCL-filter into two parts, and the current flowing between these two parts is measured and used as the feedback of a current regulator to stabilize and improve the system performances. By this way, the inverter control system is simplified from third-order to first-order, and the close loop control system can easily be optimized for minimum steady-state error and current harmonic distortion. The characteristics of the inverter system with the proposed controller are investigated and compared with the traditional strategy. Simulations results are provided, and the new current control strategy has been experimentally tested on a 5kW fuel cell inverter.

Harmonics and Power Systems

Abstract: FUNDAMENTALS OF HARMONIC DISTORTION AND POWER QUALITY INDICES IN ELECTRIC POWER SYSTEMS Introduction Basics of Harmonic Theory Linear and Nonlinear Loads Fourier Series Power Quality Indices under Harmonic Distortion Power Quantities under Nonsinusoidal Situations References HARMONIC SOURCES Introduction The Signature of Harmonic Distortion Traditional Harmonic Sources Future Sources of Harmonics References STANDARDIZATION OF HARMONIC LEVELS Introduction Harmonic Distortion Limits References EFFECTS OF HARMONICS ON DISTRIBUTION SYSTEMS Introduction Thermal Effects on Transformers Miscellaneous Effects on Capacitor Banks Abnormal Operation of Electronic Relays Lighting Devices Telephone Interference Thermal Effects on Rotating Machines Pulsating Torques in Rotating Machines Abnormal Operation of Solid-State Devices Considerations for Cables and Equipment Operating in Harmonic Environments References HARMONICS MEASUREMENTS Introduction Relevant Harmonic Measurement Questions Measurement Procedure Relevant Aspects References HARMONIC FILTERING TECHNIQUES Introduction General Aspects in the Design of Passive Harmonic Filters Single-Tuned Filters Band-Pass Filters Relevant Aspects to Consider in the Design of Passive Filters Methodology for Design of Tuned Harmonic Filters Example 1: Adaptation of a Power Factor Capacitor Bank into a Fifth Harmonic Filter Example 2: Digital Simulation of Single-Tuned Harmonic Filters Example 3: High-Pass Filter at Generator Terminals Used to Control a Resonant Condition Example 4: Comparison between Several Harmonic Mitigating Schemes Using University of Texas at Austin HASIP Program References OTHER METHODS TO DECREASE HARMONIC DISTORTION LIMITS Introduction Network Topology Reconfiguration Increase of Supply Mode Stiffness Harmonic Cancellation through Use of Multipulse Converters Series Reactors as Harmonic Attenuator Elements Phase Balancing Reference HARMONIC ANALYSES Introduction Power Frequency vs. Harmonic Current Propagation Harmonic Source Representation Harmonic Propagation Facts Flux of Harmonic Currents Interrelation between AC System and Load Parameters Analysis Methods Examples of Harmonic Analysis References FUNDAMENTALS OF POWER LOSSES IN HARMONIC ENVIRONMENTS Introduction Meaning of Harmonic-Related Losses Relevant Aspects of Losses in Power Apparatus and Distribution Systems Harmonic Losses in Equipment Example of Determination of K Factor Rotating Machines References INDEX

A 20-mW 640-MHz CMOS continuous-time ΣΔ ADC with 20-MHz signal bandwidth, 80-dB dynamic range and 12-bit ENOB

Abstract: A wide bandwidth continuous-time sigma-delta ADC, operating between 20 and 40 MS/s output data rate, is imple- mented in 130-nm CMOS. The circuit is targeted for applications that demand high bandwidth, high resolution, and low power, such as wireless and wireline communications, medical imaging, video, and instrumentation. The third-order continuous-time mod- ulator comprises a third-order RC operational-amplifier-based loop filter and 4-bit internal quantizer operating at 640 MHz. A 400-fs rms jitter LC PLL with 450-kHz bandwidth is integrated, generating the low-jitter clock for the jitter-sensitive contin- uous-time ADC from a single-ended input clock between 13.5 and 40 MHz. To reduce clock jitter sensitivity, nonreturn-to-zero (NRZ) DAC pulse shaping is used. The excess loop delay is set to half the sampling period of the quantizer and the degradation of modulator stability due to excess loop delay is avoided with a new architecture. The ADC achieves 76-dB SNR, 78-dB THD, and a 74-dB SNDR or 12 ENOB over a 20-MHz signal band at an OSR of 16. The power consumption of the CT modulator itself is 20 mW and in total the ADC dissipates 58 mW from the 1.2-V supply. Index Terms—Analog-to-digital conversion, CMOS analog inte- grated circuits, continuous-time modulation, continuous-time filters, delta-sigma modulation, low-pass filter, low power design, low-voltage design, multibit internal quantization, sigma-delta modulation.

Zero-phase odd-harmonic repetitive controller for a single-phase PWM inverter

Abstract: In this paper, a zero-phase odd-harmonic repetitive control scheme is proposed for pulse-width modulation inverters. The proposed repetitive controller combines an odd-harmonic periodic generator with a noncasual zero-phase compensation filter. It occupies less data memory than a conventional repetitive controller does. Moreover, it offers faster convergence of the tracking error, and yields very low total harmonics distortion (THD) and low tracking error. Analysis and design of the proposed system are presented. Experimental results with the proposed repetitive controller are presented to validate the approach. The phenomena of even-harmonic residues in the proposed control system is discussed and experimentally demonstrated.

Multiple sets of solutions for harmonic elimination PWM bipolar waveforms: analysis and experimental verification

Abstract: Multiple sets of solutions for the selective harmonic elimination pulse-width modulation method for inverter control exist. These sets present an independent solution to the same problem but further investigation reveals that certain sets may offer an improved overall harmonic performance. In this paper, a minimization method is discussed as a way to obtain these multiple sets of switching angles. A simple distortion harmonic factor that takes into account the first two most significant harmonics present in the generated waveform is considered in order to evaluate the performance of each set. The bipolar waveform is thoroughly analyzed and two cases are considered; single-phase patterns which eliminate all odd harmonics and three-phase counterparts which eliminate only the nontriplen odd harmonics from the line-to-neutral pattern but such harmonics are naturally eliminated from the line-to-line waveform. Experimental results support the theoretical considerations reported in the paper.

A novel DSP-based current-controlled PWM strategy for single phase grid connected inverters

Abstract: The three major approaches for current-regulated inverters are ramp comparison, hysteresis control, and predictive current control. From these three, predictive current control offers the potential for achieving more precise current control with minimum distortion and harmonic noise. But, the predictive method is difficult to implement and needs more computational burden. The traditional predictive current controller has a poor performance under component parameter variations, and is less robust to filters inductance mismatch. A robust predictive current control strategy was proposed and studied. Both simulations and experimental results show that the proposed method is much more robust to parameter mismatch than the traditional one.

Harmonic analysis in a power system with wind generation

Abstract: Variable-speed wind turbines inject harmonic currents in the network, which may potentially create voltage distortion problems. In this paper, a case study is presented for a 10-MW wind farm, intended to be connected to a network with extended high-voltage submarine cable lines. First, the system modeling approach and the harmonic load-flow calculation is described. Then, the harmonic impedance of the system is calculated for a variety of configurations and operating conditions, and its main characteristics are discussed. Harmonic load-flow calculations are provided to indicate potential voltage distortion problems. A simplified methodology, suggested in relevant IEC publications, is applied to the system and its results are compared to those of the harmonic load flow. A discussion on the summation of harmonic currents within a wind farm is also included

Reduced PWM harmonic distortion for multilevel inverters operating over a wide modulation range

Abstract: It is known that the optimal carrier based approach for modulating a multilevel converter is to use a phase disposition (PD) carrier arrangement with a common mode offset added to the reference waveforms to centre the implicitly selected space vectors. However, this strategy does not fully utilize all available voltage levels at lower modulation depths, with an odd level system only using odd voltage levels and an even level system only using even voltage levels as the modulation depth varies. Recent work has suggested that this is not the harmonically optimal approach at reduced modulation depths. This paper shows how up to a 40% reduction in harmonic distortion can be achieved if all available voltage levels are used throughout the linear modulation range. The improvement is achieved by adding a simple (1/2) carrier magnitude common mode dc offset in key modulation regions, which allows the converter to use all available voltage levels. The paper uses analytical spectral decomposition and harmonic flux trajectory analysis to propose a theoretical basis for this improvement, and to determine the precise points at which the (1/2) carrier magnitude offset should be added to achieve the harmonic improvement.

Fault-Tolerant Operating Strategies Applied to Three-Phase Induction-Motor Drives

Abstract: This paper presents a comparative analysis involving several fault-tolerant operating strategies, applied to three-phase induction-motor drives, that intend to compensate for inverter faults. The results presented show the advantages and the inconveniences of several fault-tolerant drive structures, under different control techniques, such as the field-oriented control and the direct torque control. Experimental results concerning the performance of the three-phase induction motor, based on the analysis of some key parameters, like induction-motor efficiency, motor power factor, and harmonic distortion of both motor line currents and phase voltages, will be presented

Model-based generation of low distortion currents in grid-coupled PWM-inverters using an LCL output filter

Abstract: In this paper, a single phase inductance–capacitance– inductance (LCL) output stage for grid coupled inverters is designed and built. An accurate model and observer of the output filter and the distorted grid voltage are implemented. The paper deals with the construction of a 14-state model, and the feedback control loop to obtain adequate closed loop response. Simulations indicate a good performance of the controller, with a total harmonic current distortion (THD) below 1%. Experimental results confirm simulations, and illustrate the correct operation of the Kalman observer to estimate the distorted grid voltage (THD 3%). The observer only uses the inverter current measurement as input. The output filter effectively reduces the pulsewidth modulation harmonics in the grid current.

Feedforward current control of boost single-phase PFC converters

Abstract: This paper presents the theory and application of feedforward current control for boost single-phase ac-dc converters with power factor correction. The proposed feedforward signal involves the instantaneous line voltage and the derivative of the reference current. The new control method is compared to existing feedback and feedforward control methods and is shown to significantly reduce input current harmonic distortion, particularly for applications where the current loop crossover frequency is relatively low compared to the line frequency. Implementation of the proposed control using analog devices and the associated issues, such as performance sensitivity to parameter variation and uncertainties, are presented. Analysis results are complemented by numerical simulation and experimental results from a prototype converter. Targeted applications of the proposed method are airborne systems where the line frequency is high, as well as low-cost digital control for terrestrial 50-60-Hz systems where the current loop crossover frequency is limited by the speed of the digital controller.

Harmonic analysis of the korean high-speed railway using the eight-port representation model

Abstract: This paper presents a harmonic analysis model for the Korean high-speed railway. Since the harmonic current flows through the catenary system, the catenary system must be modeled exactly to analyze harmonic current amplifications and the total harmonic distortion. In the present work, the line constants of five conductors in the catenary system were calculated by the reduction method, and each subsystem, which consisted of the Korean high-speed railway system, was modeled by the eight-port representation. Simulation results using the proposed model were compared to field test data of the Korean high-speed railway system, and the accuracy of the harmonic analysis model was verified. Also, the harmonic characteristics of the Korean high-speed railway system are presented.

A highly linear and efficient differential CMOS power amplifier with harmonic control

Abstract: A 2.45 GHz fully differential CMOS power amplifier (PA) with high efficiency and linearity is presented. For this work, a 0.18-/spl mu/m standard CMOS process with Cu-metal is employed and all components of the two-stage circuit except an output transformer and a few bond wires are integrated into one chip. To improve the linearity, an optimum gate bias is applied for the cancellation of the nonlinear harmonic generated by g/sub m3/ and a new harmonic termination technique at the common source node is adopted along with normal harmonic termination at the drain. The harmonic termination at the source effectively suppresses the second harmonic generated from the input and output. The amplifier delivers a 20.5dBm of P/sub 1dB/ with 17.5 dB of power gain and 37% of power-added efficiency (PAE). Linearity measurements from a two-tone test show that the power amplifier with the second harmonic termination improves the IMD3 and IMD5 over the amplifier without the harmonic termination by maximally 6 dB and 7 dB, respectively. Furthermore, the linearity improvements appear over a wide range of the power levels and the linearity is maintained under -45 dBc of IMD3 and -57dBc of IMD5 when the output power is backed off by more than 5dB from P/sub 1dB/. From the OFDM signal test, the second harmonic termination improves the error vector magnitude (EVM) by over 40% for an output power level satisfying the 4.6% EVM specification.

Digital Background Correction of Harmonic Distortion in Pipelined ADCs

Abstract: Pipelined analog-to-digital converters (ADCs) are sensitive to distortion introduced by the residue amplifiers in their first few stages. Unfortunately, residue amplifier distortion tends to be inversely related to power consumption in practice, so the residue amplifiers usually are the dominant consumers of power in high-resolution pipelined ADCs. This paper presents a background calibration technique that digitally measures and cancels ADC error arising from distortion introduced by the residue amplifiers. It allows the use of higher distortion and, therefore, lower power residue amplifiers in high-accuracy pipelined ADCs, thereby significantly reducing overall power consumption relative to conventional pipelined ADCs

A Multilevel Inverter Topology for Inductively Coupled Power Transfer

Abstract: This paper describes a multilevel inverter that can synthesize quantized approximations of arbitrary ac waveforms. This converter could be used to deliver power over multiple frequencies simultaneously. Unlike traditional multilevel inverters, this topology does not require an external voltage balancing circuit, a complicated control scheme, or isolated dc sources to maintain its voltage levels while delivering sustained real power. In this paper, we use this circuit for heating frequency selectable induction targets designed to stimulate temperature sensitive polymer gel actuators. For this application our multilevel inverter offers higher efficiency than a pulse width modulated full-bridge inverter (a more conventional power supply solution) at comparable levels of total harmonic distortion

Multilevel transformerless topologies for single-phase grid-connected converters

Abstract: Multilevel voltage source inverters synthesize the AC output terminal voltage from several levels of voltages, stepped waveforms can be produced, which approach the reference waveform with low harmonic distortion, thus reducing filter requirements. The need of several sources on the DC side of the converter makes multilevel technology attractive for photovoltaic and fuel cells applications. For low-power grid connected applications a single phase converter can be used and it is possible to remove the transformer in the inverter in order to reduce losses, costs and size. Galvanic connection of the grid and the DC sources in transformerless systems can introduce additional leakage currents due to the earth capacitance. This currents increase conducted and radiated electromagnetic emissions, harmonics injected in the utility grid and looses. Amplitude and spectrum of leakage current depends not only on converter topology, it depends also on switching strategy and resonant circuit formed by the ground capacitance, the converter, the AC filter and the grid. In this paper several topologies are analyzed and compared focusing on leakage current potential.

Harmonic mitigation throughout a distribution system: a distributed-generator-based solution

Abstract: The paper investigates the use of ancillary services from inverter-interfaced distributed generators (DGs) to achieve harmonic mitigation across a network. The approach is to include the functionality of a resistive active-power filter (R-APF) within several DGs. The R-APF provides adjustable damping at harmonic frequencies. In a realistic network, which has feeder sections of different characteristic impedances, it is impractical to damp with a single value of resistance. Instead, feeders are split into harmonic sections based on the standing waves of the highest-order harmonic, and DG ancillary services are called up for each section. Co-ordination of services from each DG is arranged through adaptation of the harmonic resistance according to target THD levels. The primary purpose of each DG is the supply of real power and this is respected through a further aspect of the resistance adaptation which reduces the harmonic duty of an individual DG if it approaches the apparent-power rating of the inverter. The harmonic VA required of the inverter is dependent on both the chosen harmonic resistance and the harmonic-voltage component present at the connection bus. The system is demonstrated through a simulation of an irregular feeder using Simulink and PLECS.

Control of the single-phase three-leg AC/AC converter

Abstract: This paper investigates the control of a single-phase three-leg ac/ac reversible converter in which a leg is shared by both the grid and the load side. Pulsewidth-modulation (PWM) techniques based on scalar and vector approaches are developed, introducing the concept of local and general apportioning factor and, also, a complete equivalence between scalar and space vector PWM. A hysteresis current controller capable of taking into account the shared leg is developed and a zero current error linear controller is presented. Furthermore, a control strategy to obtain maximum utilization of the dc-bus voltage is proposed. In addition, several relevant characteristics of the converter are addressed, such as voltage rating, harmonic distortion, shared leg and capacitor currents, and power rating. The converter is compared to four-leg and two-leg converters. Experimental results are presented.

Development of a Single Phase SPWM Microcontroller-Based Inverter

Abstract: This paper presents the development of single phase sinusoidal pulse width modulation (SPWM) microcontroller-based inverter. The attractiveness of this configuration is the used of a microcontroller to generate sinusoidal pulse width modulation (SPWM) pulses. Microcontroller is able to store the required commands to generate the necessary waveforms to control the frequency of the inverter through proper design of switching pulses. The SPWM technique was used to produce pure sinusoidal wave of voltage and current output. This inverter is designed to be either for stand-alone or for grid connected from a direct supply of photovoltaic (PV) cells. In this paper SPWM switching technique is first reviewed. Subsequently control circuit and power circuit for inverter are discussed. Finally the experimental results are discussed. The 200W designed prototype of the inverter was tested with the resistive load and found that total harmonic distortion (THD) is less than 4 % for voltage and 8 % for current.

Linear and Nonlinear Control Techniques for a Three-Phase Three-Level NPC Boost Rectifier

Abstract: This paper deals with three control techniques for a three-phase three-level neutral-point-clamped (NPC) boost rectifier to study their relative performance. Linear, nonlinear, and nonlinear model reference adaptive control (MRAC) methods are developed to control power factor (PF) and regulate output and neutral point voltages. These controllers are designed in Simulink and implemented in real time using the DS1104 DSP of dSPACE for validation on a 1.2-kW prototype of an NPC boost rectifier operating at 1.92 kHz. The performance of boost converter with three control methods has been investigated respectively in steady state in terms of line-current harmonic distortion, efficiency, and PF and during transients such as load steps, utility disturbances, reactive power control, and dc-bus voltage tracking behavior. The linear PI controllers are characterized by reduced complexity but poor performance, whereas the nonlinear control technique has improved the converter performance significantly, while nonlinear MRAC exhibits much better performance in a wide operating range

Theoretical and experimental comparison of total harmonic distortion factors for the evaluation of harmonic and interharmonic pollution of grid-connected photovoltaic systems

Abstract: Grid-connected photovoltaic systems are increasingly used in electrical distribution systems However, they inject distorted currents Therefore, special attention must be paid to harmonic and interharmonic measurements The new edition of IEC 61000-4-7 introduces the concept of harmonic and interharmonic groups, which implies new expressions for total harmonic distortion (THD) factors In this paper, a theoretical and experimental comparison is made between the different THD factors in order to show which of the currently defined distortion factors is best suited to detect harmonic and interharmonic pollution Experimental tests were carried out first by means of a calibrator and subsequently in a single-phase grid-connected photovoltaic system In both cases, measurements were carried out with a PC-based instrument developed by the authors and able to calculate the distortion factors according to IEC 61000-4-7

Improving mains current quality for three-phase three-switch buck-type PWM rectifiers

Abstract: Modulation schemes for three-phase three-switch buck-type pulsewidth modulation rectifiers where the switching state of one bridge leg is clamped within a π 3-wide interval of the mains period guarantee minimum switching losses as well as minimum input filter capacitor voltage ripple and minimum dc current ripple. However, as shown in this paper by a detailed analysis of the time behavior of the input filter capacitor voltages within a pulse period such modulation schemes are characterized by the occurrence of sliding intersections of the filter capacitor voltages which causes input current distortion. An advanced modulation scheme is proposed which prevents the input current distortion and allows it to maintain the optimum performance of conventional modulation schemes. The theoretical considerations are finally verified by measurements on a 5-kW hardware prototype.

Frequency-dependent harmonic-distortion analysis of a linearized cross-coupled CMOS OTA and its application to OTA-C filters

Abstract: Recent progress of wide-band communication systems demands high-frequency circuits. Conventionally, the linearity of the operational transconductance amplifier and capacitor (OTA-C) has been analyzed using Taylor series expansion. Unfortunately, this approach does not predict the frequency-dependent linearity degradation. Thus, to properly design linearized OTAs, the frequency dependence of these coefficients must be determined. In this paper, we present a frequency-dependent harmonic-distortion analytical method applied to a linear-enhanced OTA. This OTA, which is suitable for high-frequency operation, uses three linearization techniques simultaneously: 1) attenuation through floating-gate MOS transistors; 2) source degeneration; and 3) polynomial cancellation techniques. By using the harmonic-distortion analysis, some properties on the performance of OTA are used to improve the performance of OTA-C based circuits at high frequencies. A 0.5-mum CMOS OTA simulation and experimental results are shown to verify the harmonic-distortion analytical method

A Dynamic Tuning Method for Distributed Active Filter Systems

Abstract: The dramatic growth of power electronics applications has led to serious harmonic pollutions in the power system. The phenomenon of harmonic resonance resulting in severe voltage distortion has been reported. Various suppression techniques have been proposed to resolve this problem. Single termination active filter, whether operating with a constant conductance command or an automatically tuned conductance command, fail to suppress the harmonic resonance effectively and the voltage distortion may still be severe along the radial line. This paper proposes a capacity tuning scheme for the distributed active filter systems (DAFS) to enhance the harmonic filtering performance. Based on the measured voltage THD at the installation point, the active filter can dynamically adjusts its filtering capacity to maintain the voltage THD at a desired level. The proposed strategy can be integrated with the droop control between the conductance command and volt-ampere consumption so that the harmonic filtering workload is evenly shared among various active filter units of the DAFS. The operation principle is explained in this paper and test results based on simulation and experiment are provided to validate the proposed tuning scheme.

Optimized Pulse Patterns for the 5-Level ANPC Converter for High Speed High Power Applications

Abstract: This paper presents the analysis of the active neutral-point-clamped 5-level converter (ANPC5L) with regards to the total harmonic distortion (THD) for high speed, high power applications. A 5 MW machine with fundamental frequency of 500 Hz is considered. The converter can be switched up to 2 kHz, thereby making the switching frequency to fundamental frequency ratio in the range of 3-4. Different optimized pulse patterns (OPP) are studied for this case. It is shown that no extra filter is necessary to limit the THD in the considered application, when applying the proposed pulse patterns. Topology specific issues, such as the floating capacitor voltage balancing and the switching frequency of the devices, are investigated in detail for the proposed pulse patterns. The results are compared with a traditional pulse width modulation (PWM) approach

Harmonic mitigation using 12-pulse AC-DC converter in vector-controlled induction motor drives

Abstract: In this paper, a novel autotransformer with a reduced kilovolt-ampere rating is presented for harmonic current reduction in twelve-pulse ac-dc converter-fed vector-controlled induction motor drives (VCIMDs). Different transformer arrangements for 12-pulse-based rectification are also studied and a novel harmonic mitigator capable of suppressing fifth, seventh, and 11th (most dominant harmonics) in the supply current is presented. The design procedure for the proposed autotransformer is presented to show the flexibility in the design for making it a cost-effective replacement suitable for retrofit applications, where presently a six-pulse diode bridge rectifier is being used. The effect of load variation on VCIMD is also studied to demonstrate the effectiveness of the proposed harmonic mitigator. A set of power-quality indices on input ac mains and on a dc bus for a VCIMD fed from different 12-pulse ac-dc converters is given to compare their performance.

Fast-scale instability of single-stage power-factor-correction power supplies

Abstract: This paper reports slow-scale instability in a single-stage power-factor-correction (PFC) power supply, which is a popular design solution for low power applications. The circuit employs a cascade configuration of a boost converter and a forward converter, which share an active switch and operate in discontinuous-conduction mode (DCM), to provide input PFC and tight output regulation. Main results are given by "exact" cycle-by-cycle circuit simulations. The effect of the slow-scale instability on the attainable power factor is illustrated in terms of total harmonic distortion which can be found by taking the fast Fourier transform of the input current. The slow-scale instability usually manifests itself as local oscillations within a line cycle. Based on the critical condition of DCM for the buck converter, the underlying mechanism of such instability is further investigated. It has been found that border collision is the underlying cause of the phenomenon. Moreover, it has been shown that the border collision observed here is effectively a nonsmooth Neimark-Sacker bifurcation. Finally, experimental results are presented for verification purposes.

Pulse-width modulated Z-source neutral-point-clamped inverter

Abstract: This paper presents the careful integration of a newly proposed Z-source topological concept to the basic neutral-point-clamped (NPC) inverter topology, for designing a three-level inverter with both voltage-buck and -boost capabilities. The designed Z-source NPC inverter uses two unique X-shaped LC impedance networks connected between two isolated dc input power sources and its inverter circuitry for boosting its ac output voltage. Through the design of an appropriate pulse-width modulation (PWM) algorithm, the two impedance networks can be short-circuited sequentially (without shooting through the inverter full dc link) for implementing the "nearest three vectors" (NTV) modulation principle with minimized harmonic distortion and device commutations per half carrier cycle, while performing voltage-boosting. With only a slight modification to the inverter PWM algorithm and by short-circuiting the two LC impedance networks simultaneously, the designed NPC inverter, with no requirement for dead-time delay, can also be operated with completely eliminated common-mode voltage. Implementation-wise, detailed vectorial analysis interestingly shows that the same generic set of carrier-based modulation expressions can be used for controlling Z-source two-level inverter and NPC inverter with and without reduced common-mode (RCM) switching. All findings presented in the paper have been confirmed in simulation and experimentally using an implemented laboratory prototype.