Transactional memory

About: Transactional memory is a research topic. Over the lifetime, 2365 publications have been published within this topic receiving 60818 citations.

Salvaging lock elision transactions

Abstract: A transactional memory system salvages hardware lock elision (HLE) transactions. A computer system of the transactional memory system records information about locks elided to begin HLE transactional execution of first and second transactional code regions. The computer system detects a pending cache line conflict of a cache line, and based on the detecting stops execution of the first code region of the first transaction and the second code region of the second transaction. The computer system determines that the first lock and the second lock are different locks and uses the recorded information about locks elided to acquire the first lock of the first transaction and the second lock of the second transaction. The computer system commits speculative state of the first transaction and the second transaction and the computer system continues execution of the first code region and the second code region non-transactionally.

A relativistic enhancement to software transactional memory

Abstract: Relativistic Programming is a technique that allows low overhead, linearly-scalable concurrent reads. It also allows joint access parallelism between readers and a writer. Unfortunately, it has so far been limited to a single writer so it does not scale on the write side. Software Transactional Memory (STM) is a technique that allows programs to take advantage of disjoint access parallelism on both the read-side and write-side. Unfortunately, STM systems have a higher overhead than many other synchronization mechanisms so although STM scales, STM starts from a lower baseline. We propose combining relativistic programming and software transactional memory in a way that gets the best of both worlds: low-overhead linearly-scalable reads that never conflict with writes and scalable disjoint access parallel writes. We argue for the correctness of our approach and present performance data that shows an actual implementation that delivers the promised performance characteristics.

The Universal Transactional Memory Construction

Abstract: The universal construction shows how to convert a sequential algorithm into a concurrent wait-free algorithm. We introduce a variant of this construction that (1) keeps a bounded state, (2) provides wait-free parallel processing, (3) tolerates thread crashes, and (4) handles non-terminating operations. The foundation of this construction is a wait-free transactional memory that is capable of isolating crash failures and non-termination failures.

Accelerating GPU Hardware Transactional Memory with Snapshot Isolation

Abstract: Snapshot Isolation (SI) is an established model in the database community, which permits write-read conflicts to pass and aborts transactions only on write-write conflicts. With the Write Skew anomaly correctly eliminated, SI can reduce the occurrence of aborts, save the work done by transactions, and greatly benefit long transactions involving complex data structures.GPUs are evolving towards a general-purpose computing device with growing support for irregular workloads, including transactional memory. The usage of snapshot isolation on transactional memory has proven to be greatly beneficial for performance. In this paper, we propose a multi-versioned memory subsystem for hardware-based transactional memory on the GPU, with a method for eliminating the Write Skew anomaly on the fly, and finally incorporate Snapshot Isolation with this system.The results show that snapshot isolation can effectively boost the performance of dynamically sized data structures such as linked lists, binary trees and red-black trees, sometimes by as much as 4.5x, which results in improved overall performance of benchmarks utilizing these data structures.