Transactional memory

About: Transactional memory is a research topic. Over the lifetime, 2365 publications have been published within this topic receiving 60818 citations.

Crafty: Efficient, HTM-Compatible Persistent Transactions

Abstract: Byte-addressable persistent memory, such as Intel/Micron 3D XPoint, is an emerging technology that bridges the gap between volatile memory and persistent storage. Data in persistent memory survives crashes and restarts; however, it is challenging to ensure that this data is consistent after failures. Existing approaches incur significant performance costs to ensure crash consistency. This paper introduces Crafty, a new approach for ensuring consistency and atomicity on persistent memory operations using commodity hardware with existing hardware transactional memory (HTM) capabilities, while incurring low overhead. Crafty employs a novel technique called nondestructive undo logging that leverages commodity HTM to control persist ordering. Our evaluation shows that Crafty outperforms state-of-the-art prior work under low contention, and performs competitively under high contention.

Dynamic Separation for Transactional Memory

Abstract: Implementations of language constructs over transactional memory have typically provided unexpected semantics, required the re-compilation of non-transacted code, or assumed new hardware. We introduce an alternative approach founded on a contract between the programmer and the language implementation in which strong semantics are provided to programs that are “correctly synchronized” in their use of the language, even if the underlying TM implementation provides weaker guarantees. Our approach is based on the dynamic separation of objects that can be updated in transactions, objects that can be updated outside transactions, and read-only objects that are accessible everywhere. We introduce explicit operations that, at run-time, identify transitions between these modes of access. Dynamic separation is more flexible than earlier notions of static separation, while still permitting an extremely wide range of hardware-based and software-based implementations. We define what it means for a program to obey the dynamic-separation discipline, and we show how a runtime checking tool—analogous to a data-race detector—can test this property. We also describe our design and implementation of a system with dynamic separation, and examine the use of dynamic separation in an asynchronous IO library.

Software transactional memory for multicore embedded systems

Abstract: Embedded systems, like general-purpose systems, can benefit from parallel execution on a symmetric multicore platform. Unfortunately, concurrency issues present in general-purpose programming also apply to embedded systems, protection from which is currently only offered with performance-limiting coarse-grained locking or error-prone and difficult-to-implement fine-grained locking. Transactional memory offers relief from these mechanisms, but has primarily been investigated on general-purpose systems. In this paper, we present Embedded Software Transactional Memory (ESTM) as a novel solution to the concurrency problem in parallel embedded applications. We investigate common software transactional memory design decisions and discuss the best decisions for an embedded platform. We offer a full implementation of an embedded STM and test it against both coarse-grained and fine-grained locking mechanisms. We find that we can meet or beat the performance of fine-grained locking over a range of application characteristics, including size of shared data, time spent in the critical section, and contention between threads. Our ESTM implementation benefits from the effective use of L1 memory, a feature which is built into our STM model but which cannot be directly utilized by traditional locking mechanisms.

Software filtering in a transactional memory system

Abstract: A method and apparatus for utilizing hardware mechanisms of a transactional memory system is herein described. Various embodiments relate to software-based filtering of operations from read and write barriers and read isolation barriers during transactional execution. Other embodiments relate to software-implemented read barrier processing to accelerate strong atomicity. Other embodiments are also described and claimed.