Transactional memory

About: Transactional memory is a research topic. Over the lifetime, 2365 publications have been published within this topic receiving 60818 citations.

Method for deployment modification of transactional behavior in corba OTS

Abstract: The present invention extends the programming model of OTS by providing a unique model that offers both flexibility and ease of use. This model separates the transactional behavior of CORBA method from the IDL interface. The transactional behavior of the CORBA method is specified in a deployment descriptor file. Each method is associated with a transactional policy. The server reads the policies of the methods during deployment time and makes decisions of making the method transactional based on the policy. Changing the transactional policy of a method is as easy as modifying the deployment descriptor and redeploying the server. If either of the two usage models that OTS offers is used, making a method transactional means that the IDL interface has to change, causing all the software components in the system to re-compile. With the present invention, such a change can be accomplished without need for such recompilation.

Abort Free SemanticTM by Dependency Aware Scheduling of Transactional Instructions

Abstract: We present a TM system that executes transactions without ever causing any aborts. The system uses a set of t-var lists, one for each transactional variable. The instructions of each transaction are placed in the appropriate t-var lists based on which t-variable each of them accesses. A set of worker threads are responsible to execute these instructions. Because of the way instructions are inserted in and removed from the lists, by the way the worker threads work, and by the fact that all the instructions of a transaction are placed in the appropriate t-var lists before doing so for the instructions of any subsequent transaction, it follows that no conflict will ever occur. Parallelism is fine-grained since it is achieved at the level of transactional instructions instead of transactions themselves (i.e., the instructions of a transaction may be executed concurrently).

Building and Using the ATLAS Transactional Memory System

Abstract: At WARFP 2005, we proposed ATLAS as a scalable implementation for transactional parallel systems [5] The impetus for the development of ATLAS is to address the significant hurdles that software simulators face in multiprocessor architectural research In particular, ATLAS is an FPGA-based system that primarily serves as a rapid software development platform for our transactional memory model, TCC [4] Leveraging commodity hardware and software tools, ATLAS is poised to support research exploring the impact of transactional memory on architecture, operating systems, compilers and programming models

A deterministic multi-way rendezvous library for haskell

Abstract: The advent of multicore processors requires mainstream concurrent programming languages with high level concurrency constructs and effective debugging techniques. Unfortunately, many concurrent programming languages are non-deterministic and allow data races. We present a deterministic concurrent communication library for an existing multi-threaded language. We implemented the SHIM communication model in the Haskell functional language, which supports asynchronous communication and transactional memory. The SHIM model uses multi-way rendezvous to guarantee determinism. We describe two implementations of the model in Haskell, demonstrating the ease of writing such a library. We illustrate our library with examples and experimentally compare two implementations. We also compare our new model with equivalent sequential programs and parallel versions using Haskell's existing concurrency mechanisms.