Transactional memory

About: Transactional memory is a research topic. Over the lifetime, 2365 publications have been published within this topic receiving 60818 citations.

StAdHyTM: A Statically Adaptive Hybrid Transactional Memory: A scalability study on large parallel graphs

Abstract: In this paper, we present a Statically Adaptive Hybrid Transactional Memory (StAdHyTM) that outperforms not only existing Hardware TM (HTM) and Software TM (STMs) but also common synchronization schemes such as locks. StAdHyTM is statically tuned to adapt to the application behavior to improve the performance. We focus in particular on large parallel graph applications. Our StAdHyTM implementation outperforms coarse-grain locks by up to 8.1× and STM by up to 2.6× in total execution time for computation kernel in the SSCA-2 benchmark. It also outperforms HTM by up to 2.1× on a 28-cores and 64GB machine. We tested large graphs of up to 268 million vertices and 2.147 billion edges on a 64-core and 128 GB machine. To the best of our knowledge, this work is the first scalability study of synchronizations involving all the TM implementations- HTM, STM, HyTM, and Adaptive HyTM.

Correctness of concurrent executions of closed nested transactions in transactional memory systems

Abstract: A generally agreed upon requirement for correctness of concurrent executions in Transactional Memory systems is that all transactions including the aborted ones read consistent values. Opacity is a recently proposed correctness criterion that satisfies the above requirement. Our first contribution in this paper is extending the opacity definition for closed nested transactions. Secondly, we define conflicts appropriate for optimistic executions which are commonly used in Software Transactional Memory systems. Using these conflicts, we define a restricted, conflict-preserving, class of opacity for closed nested transactions the membership of which can be tested in polynomial time. As our third contribution, we propose a correctness criterion that defines a class of schedules where aborted transactions do not affect consistency of the other transactions. We define a conflict-preserving subclass of this class as well. Both the class definitions and the conflict definition are new for nested transactions.

Solo-Fast Universal Constructions for Deterministic Abortable Objects

Abstract: In this paper we study efficient implementations for deterministic abortable objects. Deterministic abortable objects behave like ordinary objects when accessed sequentially, but they may return a special response abort to indicate that the operation failed (and did not take effect) when there is contention.

Understanding and utilizing hardware transactional memory capacity

Abstract: Hardware transactional memory (HTM) provides a simpler programming model than lock-based synchronization. However, HTM has limits that mean that transactions may suffer costly capacity aborts. Understanding HTM capacity is therefore critical. Unfortunately, crucial implementation details are undisclosed. In practice HTM capacity can manifest in puzzling ways. It is therefore unsurprising that the literature reports results that appear to be highly contradictory, reporting capacities that vary by nearly three orders of magnitude. We conduct an in-depth study into the causes of HTM capacity aborts using four generations of Intel's Transactional Synchronization Extensions (TSX). We identify the apparent contradictions among prior work, and shed new light on the causes of HTM capacity aborts. In doing so, we reconcile the apparent contradictions. We focus on how replacement policies and the status of the cache can affect HTM capacity. One source of surprising behavior appears to be the cache replacement policies used by the processors we evaluated. Both invalidating the cache and warming it up with the transactional working set can significantly improve the read capacity of transactions across the microarchitectures we tested. A further complication is that a physically indexed LLC will typically yield only half the total LLC capacity. We found that methodological differences in the prior work led to different warmup states and thus to their apparently contradictory findings. This paper deepens our understanding of how the underlying implementation and cache behavior affect the apparent capacity of HTM. Our insights on how to increase the read capacity of transactions can be used to optimize HTM applications, particularly those with large read-mostly transactions, which are common in the context of optimistic parallelization.