Transactional memory

About: Transactional memory is a research topic. Over the lifetime, 2365 publications have been published within this topic receiving 60818 citations.

Accelerating reference count processing in object deletion

Abstract: A computer-implemented method is provided for deleting a given object from among a plurality of objects in an object-oriented programming language computing system which uses a Reference Count (RC) of each of the plurality of objects to check a liveness of the plurality of objects. The method includes decrementing, in a Reference Counts (RCs) decrement operation, RCs of objects referenced from the given object using one or more non-atomic operations in a transaction that utilizes a hardware transactional memory mechanism to accelerate the reference counts decrement operation.

Software knows best: portable parallelism requires standardized measurements of transparent hardware

Abstract: The hardware trend of the last 15 years of dynamically trying to improve performance with little software visibility is not only irrelevant today, its counterproductive; adaptivity must be at the software level if parallel software is going to be portable, fast, and energy-efficient. A portable parallel program is an oxymoron today; there is no reason to be parallel if it's slow, and parallel can't be fast if it's portable. Hence, portable parallel programs of the future must be able to understand and measure /any/ computer on which it runs so that it can adapt effectively, which suggests that hardware measurement should be standardized and processor performance and energy consumption should become transparent.In addition to software-controlled adaptivity for execution efficiency by using techniques like autotuning and dynamic scheduling, modern software environments adapt to improve /programmer/ efficiency [1]. Classic examples include dynamic linking, dynamic memory allocation, garbage collection, interpreters, just-in-time compilers, and debugger-support. Examples that are more recent are selective embedded just in time specialization (SEJITS) [2] for highly productive languages like Python and Ruby. Thus, the future of programming is likely to involve program generators at many levels of the hierarchy tailoring the application to the machine. These productivity advances via adaptivity should be reflected in modern benchmarks: virtually no one writes the statically linked, highest-level-optimized C programs that are the foundation of most benchmark suites.The dream is to improve productivity without sacrificing too much performance. Indeed, how often have you heard the claim that a new productive environment is now "almost as fast as C" or "almost as fast as Java?" The implication of the necessary tie between productivity and performance in the manycore era is that these modern environments must be able to utilize manycore well, or the gap between highly efficient code and highly productive code will grow with the number of cores.For industry's bet on manycore to win, therefore, both very high level and very low level programming environments will need to be able to understand and measure their underlying hardware and adapt their execution so as to be portable, relatively fast, and energy-efficient.Hence, we argue that a standard of accurate hardware operation trackers (SHOT) would have a huge positive impact on making parallel software portable with good performance and energy efficiency, similar to the impact of the IEEE-754 standard had on portability of numerical software. In particular, we believe SHOT will lead to much larger improvements in portability, performance, energy efficiency of parallel codes than recent architectural fads like opportunistic "turbo modes," transactional memory, or reconfigurable computing.

Consistency Check through O-GEHL Predictors

Abstract: Transactional Memory (TM) is a promising paradigm to facilitate parallel programming for multicore processors. In Software implementation of TMs (STMs), transactions rely on a global clock to maintain consistency of transactional data. While this method is simple to implement, it results in significant timing overhead if transactions commit frequently. The alternative approach is Thread Local Clock (TLC) which exploits decentralized local variables to maintain consistency in transactions. However, TLC may increase false aborts and degrade performance of STMs. In this paper, we introduce Adaptive Clock (AC) which dynamically selects one of the two validation techniques based on probability of conflicts. AC is a speculative approach and relies on O-GEHL predictors to speculate future conflicts. We have incorporated AC into TL2 and compared the performance of the new implementation with the original STM using Stamp v0.9.10 benchmark suite. Our results reveal that AC is effective and improves performance of transactional applications up to 33%.

Exploring Irregular Reduction Support in Transactional Memory

Abstract: Transactional memory (TM) has emerged as an alternative to the lock-based parallel programming model offering an effective and optimistic management of concurrency. Recently, TM is being experimented in the context of high performance computing. Many applications in that area spent a large amount of computing time in irregular reduction operations, so their efficient parallelization is of utmost importance. This paper explores how to address irregular reductions in the TM model, analyzing which support needs to be added to the TM system to deal with reductions as a special case of conflicting memory accesses.

A Lightweight Implementation of Obstruction-Free Software Transactional Memory

Abstract: Software transactional memory (STM) has evolved as an alternative for traditional lock-based process synchronization. It promises greater degree of concurrency and faster execution. This paper proposes a simple, lightweight, and yet efficient implementation of OFTM. The major contribution of the paper is in proposing a new STM algorithm that uses simple data structure. This does not require any contention manager toward ensuring progress condition, atomicity, and serializability of transactions besides maintaining data consistency. Experimental simulation on random data set establishes the merit of the proposed solution.