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Transactional memory

About: Transactional memory is a research topic. Over the lifetime, 2365 publications have been published within this topic receiving 60818 citations.


Papers
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Journal ArticleDOI
TL;DR: This paper proposes a HTM targeted for embedded applications which is able to adapt its version management based on application behaviour at runtime and is prototyped and analysed on Altera Cyclone IV platform.

3 citations

Journal ArticleDOI
TL;DR: Remote Transaction Commit (or RTC), a mechanism for executing commit phases of STM transactions, is introduced, which decreases the overheads of spinning on locks during commit and enables exploiting the benefits of coarse-grained locking algorithms and bloom filter-based algorithms.
Abstract: Software Transactional Memory (STM) has recently emerged as a promising synchronization abstraction for multicore architectures. State-of-the-art STM algorithms, however, suffer from performance challenges due to contention and spinning on locks during the transaction commit phase. In this paper, we introduce Remote Transaction Commit (or RTC), a mechanism for executing commit phases of STM transactions. RTC dedicates server cores to execute transactional commit phases on behalf of application threads. This approach has two major benefits. First, it decreases the overheads of spinning on locks during commit, such as the number of cache misses, blocking of lock holders, and CAS operations. Second, it enables exploiting the benefits of coarse-grained locking algorithms (simple and fast lock acquisition, reduced false conflicts) and bloom filter-based algorithms (concurrent execution of independent transactions). Our experimental study on a 64-core machine with four sockets shows that RTC solves the problem of performance degradation due to spin locking on both micro-benchmarks (red-black trees), and macro-benchmarks (STAMP), especially when the commit phase is relatively long and when thread contention increases.

3 citations

Journal Article
TL;DR: A complete software platform is designed and implemented to accurately simulate and monitor the thread-level speculation of parallel programs, as well as detect memory access conflictions, and effectively support the design and analysis of SPT/TX compilers.
Abstract: Speculative Parallel Threading using Transactional Execution(SPT/TX)is a promising parallel programming/compiling technique for the future multi-core microprocessor architectures.However,the execution of parallel programs based on SPT/TX is complicated;the simulation of program execution became a key problem.This paper makes use of binary-level dynamic instrumentation techniques to perform functional simulation of SPT/TX programs.A complete software platform is designed and implemented to accurately simulate and monitor the thread-level speculation of parallel programs,as well as detect memory access conflictions,thus implement the semantics of SPT/TX.The software platform can also serve as a basis for further study of the real execution behavior of SPT/TX programs,and effectively support the design and analysis of SPT/TX compilers.

3 citations

Book ChapterDOI
24 Oct 2016
TL;DR: A static analysis is developed to compute the amount of memory used by logs in the worst execution scenarios of the programs, it is proved the soundness of the analysis and a prototype tool to infer the memory bound is shown.
Abstract: During the execution of multi-threaded and transactional programs, when new threads are created or new transactions are started, memory areas called logs are implicitly allocated to store copies of shared variables so that the threads can independently manipulate these variables. It is not easy to manually calculate the peak of memory allocated for logs when programs have arbitrary mixes of nested transactions and new thread creations. We develop a static analysis to compute the amount of memory used by logs in the worst execution scenarios of the programs. We prove the soundness of our analysis and we show a prototype tool to infer the memory bound.

3 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202316
202240
202129
202063
201970
201888