Transactional memory

About: Transactional memory is a research topic. Over the lifetime, 2365 publications have been published within this topic receiving 60818 citations.

Combining Dynamic Workflow and Transactional Semantics Using a Pattern-Based Approach

Abstract: In this paper, we propose a new paradigm, called dynamic transactional pattern, for specifying flexible and reliable composite Web services in a pervasive environment. This new paradigm is a convergence concept of dynamic Workflow patterns and advanced transactional model. It can be seen both as a dynamic coordination and a structural transaction. Indeed, it combines dynamic Control-Flow flexibility and transactional processing reliability.

Transactions: they're not just for banking any more

Abstract: The notion of a database transaction has been extended to become a viable 'interface' for the primary memory system of a multicore system. This "transactional memory" may be an important paradigm for software engineers, so they can extract high levels of performance from such multiprocessor systems. This article will describe this new paradigm - outlining its basic structure, and benefits, along with some of the many implementation variations currently in use.

Enhancing the performance and usability of software transactional memory

Abstract: The computing industry is at the brink of a “concurrency revolution”. Mainstream microprocessor vendors have started manufacturing multicore chips. Low end desktops and laptops are already turning into parallel machines. Soon, every programmer will have to write parallel programs to leverage the processing horsepower of multicore chips. However, parallel programming is known to be hard; at the current state-of-the-art, it is effectively limited to (rare) experts. One of the key challenges in parallel programming is correct data sharing among concurrent computations. The traditional solution of lock-based mutual exclusion is known to have several significant drawbacks, such as deadlock, lack of composability, intolerance to arbitrary delays, etc. Transactional Memory (TM) is a new technology that promises to alleviate these problems, significantly simplifying parallel programming. One of the key properties of early software runtimes for TM (STMs) was that they were nonblocking, i.e. arbitrary delays in some transactions in the system would not interfere with forward progress of other transactions. Nonblocking STMs avoid some severe problems such as delays due to preemption, priority inversion, and thread faults. However, early attempts incurred significant runtime overheads, making then largely impractical. In this dissertation, we improve nonblocking STMs in several ways, making them progressively more efficient and competitive with state-of-the-art blocking STMs. Specifically, we present two nonblocking STMs, the Adaptive STM (ASTM) and the Rochester STM (RSTM) that reduce the levels of indirection required to access transactional data. We also evaluate the impact of other design choices such as ownership acquisition and release techniques, obstruction free vs. lock free progress, visible vs. invisible reads, etc. on performance of these STMs. We thereafter present the Marathe and Moir STM (MM-STM), which further improves performance of nonblocking STMs by incorporating significant optimizations such as timestamp based validation, store based ownership release, and undo logs, all of which appear in recent blocking STMs. Various forms of lock-based atomicity are considered to be an appealing semantics for STM transactions. These semantics permit the so called publication programming idiom, where a transaction takes an action that makes some formerly thread private data accessible to concurrent threads in the system. They also permit the privatization programming idiom, where a transaction takes an action that effectively makes some formerly shared data private to a single thread in the system. However, in most practical STMs, both privatization and publication lead to nontrivial races between transactional and nontransactional accesses to data that may be privatized or publicized respectively. Efficiently ensuring lock-based semantics in STMs is a nontrivial problem. We present a novel technique in STM runtimes, based on a new notion of partially visible reads, that enforces lock-based semantics. We show that this technique scales well on a wide range of microbenchmarks.

Dynamic Prediction based Scheduling for TM

Abstract: Transactional memory (TM) provides an intuitive and simple way of writing parallel programs. TMs execute parallel programs speculatively and deliver better performance than conventional lock based parallel programs. However, in certain scenarios when an application lacks scope for parallelism, TMs are outperformed by conventional fine-grained locking. TM schedulers, which serialize transactions that face contention, have shown promise in improving performance of TMs in such scenarios. In this thesis, we develop a Dynamic Prediction based Scheduler (DPS) that exploits novel prediction techniques, like temporal locality and locality of access across repeated transactions. DPS predicts the access sets of future transactions based on the access patterns of the past transactions of the individual threads. We also propose a novel heuristic, called serialization affinity, which tends to serialize transactions with a probability proportional to the current amount of contention. Using the information of the currently executing transactions, the current amount of contention, and the predicted access sets, DPS dynamically serializes transactions to minimize conflicts. We implement DPS in two state-of-the-art STMs, SwissTM and TinySTM. Our results show that in scenarios where the number of threads is higher than the number of cores, DPS improves the performance of these STMs by up to 55% and 3000% respectively. On the other hand, the overhead of prediction techniques in DPS causes a performance degradation of just 5-8% in some cases, when the number of threads is less than the number of cores.