Transactional memory

About: Transactional memory is a research topic. Over the lifetime, 2365 publications have been published within this topic receiving 60818 citations.

Software Transactional Memory Techniques: Principles, Design, and Implementation Trade-offs

Abstract: The advent of multicore processors has put the performance of traditional parallel programming techniques in question. The traditional lock-based parallel programming techniques are error prone and suffer from various problems such as deadlocks, live-locks, priority inversion etc. In the last one and half decade, a considerable amount of the research has been carried out to achieve the synchronization among the parallel applications without using locking. One of most promising technique which has come out as a result of this research work is Transactional Memory (TM). Transactional Memory system commits the data in atomic code sequences called the transaction. Research has shown that Transactional Memory has the potential to out perform traditional locking mechanisms. In order to understand the design and implementation trade-offs of different implementations of the Software Transactional Memory, a comprehensive comparative study is required. Although some comparative studies have been carried out in the past, they were very focused in their scope and covered only few STM implementations. In this master thesis, a qualitative literature survey is conducted and the state of the art in Software Transactional Memory is presented, covering prominent approaches to date while discussing their design and implementation trade offs.

A Natural Measure for Denoting Software System Complexity

Abstract: The problem of complexity measurement is as old as programming, when programming became a major problem for the software industry in the sixties. The fact is clearly attested in the two NATO reports on software engineering [A14]. Von Neumann himself give a lot of attention to complexity in the last decade of his shortened lifetime.

TASE: Reducing latency of symbolic execution with transactional memory

Abstract: We present the design and implementation of a tool called TASE that uses transactional memory to reduce the latency of symbolic-execution applications with small amounts of symbolic state. Execution paths are executed natively while operating on concrete values, and only when execution encounters symbolic values (or modeled functions) is native execution suspended and interpretation begun. Execution then returns to its native mode when symbolic values are no longer encountered. The key innovations in the design of TASE are a technique for amortizing the cost of checking whether values are symbolic over few instructions, and the use of hardware-supported transactional memory (TSX) to implement native execution that rolls back with no effect when use of a symbolic value is detected (perhaps belatedly). We show that TASE has the potential to dramatically improve some latency-sensitive applications of symbolic execution, such as methods to verify the behavior of a client in a client-server application.

DikuSTM A Transactional Memory Library for C++ and C++0x Master's Thesis

Abstract: As multicore processors become increasingly common, robust concurrent programming techniques are getting increasingly important. Locking mechanisms such as mutexes and monitors are commonly used, but are hard to use correctly, and do little to prevent common error situations such as race conditions, deadlocks and livelocks. Code written using these techniques also prevent programmers from abstracting away the implementation details of their code, as individually thread-safe pieces of code can not be safely composed into larger thread-safe components. Software Transactional Memory (STM) is an alternative concurrency model, which uses transactions as the basic synchronization mechanism; any code within a transaction is executed in isolation from other transactions and commits its changes atomically, providing semantics very similar to those known from database systems. In this work, strategies for designing and implementing a STM system in C++, and the upcoming language revision informally known as C++0x, are explored. With an emphasis on correctness and simplicity of use, generic programming techniques are used to design an elegant and general interface for library users, preserving compile-time type safety and minimizing the scope for programmer error, while also avoiding the performance penalty of run-time polymorphism. We also develop a double-buUered deferred update scheme, eliminating many of the problems typically associated with deferred update systems. As all transactional data is allocated in-place, we also avoid the extensive dynamic allocations and pointer indirections typically associated with indirection-based systems.

Determining failure context in hardware transactional memories

Abstract: A method for diagnosing an aborted transaction from a plurality of transactions is executed by a processor core with a transactional memory, that stores information corresponding to a plurality of transactions executed by the processor core, and a transaction diagnostic register. The processor core retrieves context summary information from at least one register of the processor core. The processor core stores the context summary information of aborted transactions into the transactional memory or the transaction diagnostic register. The context summary information can be used for diagnosing the aborted transactions.