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Transactional memory

About: Transactional memory is a research topic. Over the lifetime, 2365 publications have been published within this topic receiving 60818 citations.


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Book ChapterDOI
27 Sep 2018
TL;DR: A new STM-based mutual exclusion algorithm known as SME has been proposed and the results have been compared with those due to traditional FAPP algorithm and the proposed SME implementation is on the ring topology that provides a stable structure suitable for increasing the degree of multiprogramming.
Abstract: The utilization of concurrent computing has significantly increased in the last three decades for various commercial and scientific applications. However, concurrent systems often have an astronomically large number of possible executions. These executions may proceed in many different ways depending on scheduling of processes, sequence of inputs, etc. Such non-determinism often leads to gaps or malfunctions in the system design. Thus synchronization of resources became a great issue and programmers had to put huge effort solving this. Transactional memory is one of those measures to solve these inconsistencies. The goal of a transactional memory system is to transparently support the definition of regions of code that are considered in a transaction to maintain the ACID properties of transactions. This paper explores the possibility of designing a STM based mutual exclusion algorithm and compares its performance in terms of time and message complexity. A new STM-based mutual exclusion algorithm known as SME has been proposed and the results have been compared with those due to traditional FAPP algorithm. Besides, the proposed SME implementation is on the ring topology that provides a stable structure suitable for increasing the degree of multiprogramming.
Patent
15 Jul 2013
TL;DR: In this paper, techniques for improved transactional memory management are described, where a processor element, an execution component for execution by the processor element to concurrently execute a software transaction and a hardware transaction according to a transactional processing process, and a finalization component to abort the hardware transaction when the global lock is active when execution of the software transaction completes.
Abstract: Techniques for improved transactional memory management are described. In one embodiment, for example, an apparatus may comprise a processor element, an execution component for execution by the processor element to concurrently execute a software transaction and a hardware transaction according to a transactional memory process, a tracking component for execution by the processor element to activate a global lock to indicate that the software transaction is undergoing execution, and a finalization component for execution by the processor element to commit the software transaction and deactivate the global lock when execution of the software transaction completes, the finalization component to abort the hardware transaction when the global lock is active when execution of the hardware transaction completes. Other embodiments are described and claimed.
Proceedings ArticleDOI
21 Jan 2022
TL;DR: This paper proposes SAMShm, a new version of SAM, which shows good performance under any number of cores and reduces the overhead of socket communication and garbage collection using the message channel based on shared memory.
Abstract: SAM is a parallel programming model in Haskell, suitable for manycore computing environments. It has been developed in two versions: SAMSoc adopting the socket communication and SAMSTM adopting the software transactional memory (STM). However, both versions of SAM do not always guarantee the best performance due to the overhead of synchronization. Therefore we have to select a specific version of SAMs to promote the performance depending on the number of cores available in the running environment. In this paper, we propose SAMShm, a new version of SAM, which shows good performance under any number of cores. SAMShm reduces the overhead of socket communication and garbage collection using the message channel based on shared memory. According to the performance test on the 72-core machine, the scalability of SAMShm is improved by 52% points over SAMSoc and 295% points over SAMSTM.
Journal ArticleDOI
TL;DR: This work proposes a hybrid transactional memory scheme based on both abort prediction and an adaptive retry policy, called HyTM-AP, which can predict not only conflicts between concurrently running transactions, but also the capacity and other aborts of transactions by collecting the information of transactions previously executed.
Abstract: Recently, works on integrating HTM with STM, called hybrid transactional memory (HyTM), have intensively studied. However, the existing works consider only the prediction of a conflict between two transactions and provide a static HTM configuration for all workloads. To solve the problems, we proposes a hybrid transactional memory scheme based on both abort prediction and an adaptive retry policy, called HyTM-AP. First, our HyTM-AP can predict not only conflicts between concurrently running transactions, but also the capacity and other aborts of transactions by collecting the information of transactions previously executed. Second, our HyTM-AP can provide an adaptive retry policy based on machine learning algorithms, according to the characteristic of a given workload. Finally, through our experimental performance analysis using the STAMP benchmark, our HyTM-AP shows 12~13% better performance than the existing HyTM schemes.
Posted ContentDOI
02 Jun 2022
TL;DR: A survey of thread and data mapping that uses solely information gathered from the STM runtime to guide thread and mapping decisions can be found in this paper , where the authors also discuss future research directions within this research area.
Abstract: In current microarchitectures, due to the complex memory hierarchies and different latencies on memory accesses, thread and data mapping are important issues to improve application performance. Software transactional memory (STM) is an abstraction used for thread synchronization, replacing the use of locks in parallel programming. Regarding thread and data mapping, STM presents new challenges and mapping opportunities, since (1) STM can use different conflict detection and resolution strategies, making the behavior of the application less predictable and; (2) the STM runtime has precise information about shared data and the intensity with each thread accesses them. These unique characteristics provide many opportunities for low-overhead, but precise statistics to guide mapping strategies for STM applications. The main objective of this paper is to survey the existing work about thread and data mapping that uses solely information gathered from the STM runtime to guide thread and data mapping decisions. We also discuss future research directions within this research area.

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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202316
202240
202129
202063
201970
201888