Transactional memory

About: Transactional memory is a research topic. Over the lifetime, 2365 publications have been published within this topic receiving 60818 citations.

Updating metadata in hardware transactional memory user aborts

Abstract: A system for managing abort events of Hardware Transactional Memory (HTM) transactions to an in-memory database, comprising a processor adapted to control a plurality of abort evens of a plurality of database transactions held concurrently to a shared in-memory database, wherein each of the plurality of database transactions is split to HTM transactions executed atomically to access one of a plurality of rows of a database, by: analyzing a metadata record associated with each potential abort event, the metadata record comprising a row ID value and a row version value of a certain one of the rows which is concurrently accessed by an aborting HTM transaction(s) and another HTM transaction(s), comparing the row ID value and the row version value to a local ID value and a local version value of the aborting HTM transaction(s) and determining a contention condition between the aborting HTM transaction(s) and the other HTM transaction(s).

Transactional memory having local CAM and NFA resources

Abstract: A remote processor interacts with a transactional memory that has a memory, local BWC (Byte-Wise Compare) resources, and local NFA (Non-deterministic Finite Automaton) engine resources. The processor causes a byte stream to be transferred into the transactional memory and into the memory. The processor then uses the BWC circuit to find a character signature in the byte stream. The processor obtains information about the character signature from the BWC circuit, and based on the information uses the NFA engine to process the byte stream starting at a byte position determined based at least in part on the results of the BWC circuit. From the time the byte stream is initially written into the transactional memory until the time the NFA engine completes, the byte stream is not read out of the transactional memory.

Symbolic prefetching in transactional distributed shared memory

Abstract: We present a static analysis for the automatic generation of symbolic prefetches in a transactional distributed shared memory. A symbolic prefetch specifies the first object to be prefetched follow...

System and method for supporting resource manager (RM) instance awareness in a transactional environment

Abstract: A system and method can support transaction processing in a transactional environment. A transactional server operates to receive resource manager (RM) instance information from a data source that is associated with one or more RM instances, wherein the received instance information allows the transactional server to be aware of which RM instance that the transactional server is currently connected to. Furthermore, the transactional server operates to save the received instance information into one or more tables that are associated with the transactional server. Then, the transactional server can process a global transaction based on the instance information saved in the one or more tables.

Unlimited transactional memory with assurances of movement during transfer, using hardware global lock

Abstract: FIELD: computer engineering.SUBSTANCE: flow processing device comprises hardware transactional memory (HTM) conflict manager, which provides transforming a transaction with predicted execution from multiple transactions with predicted execution into a transaction without predicted execution, wherein transaction without predicted execution is intended for producing global hardware lock for transaction without predicted execution and global hardware lock read remaining transactions with predicted execution, which is cancelled, if global hardware lock is obtained; and execution module for executing instructions of transaction without predicted execution without advance, while global hardware lock for transaction without predicted execution, wherein transaction without predicted execution is intended to release global hardware lock after execution of instructions transaction without anticipatory design.EFFECT: guaranteeing execution of transaction using hardware global lock.25 cl, 19 dwg