Showing papers on "Transistor published in 1969"

Physics of Semiconductor Devices

Abstract: Introduction. Part I Semiconductor Physics. Chapter 1 Physics and Properties of Semiconductors-A Review. 1.1 Introduction. 1.2 Crystal Structure. 1.3 Energy Bands and Energy Gap. 1.4 Carrier Concentration at Thermal Equilibrium. 1.5 Carrier-Transport Phenomena. 1.6 Phonon, Optical, and Thermal Properties. 1.7 Heterojunctions and Nanostructures. 1.8 Basic Equations and Examples. Part II Device Building Blocks. Chapter 2 p-n Junctions. 2.1 Introduction. 2.2 Depletion Region. 2.3 Current-Voltage Characteristics. 2.4 Junction Breakdown. 2.5 Transient Behavior and Noise. 2.6 Terminal Functions. 2.7 Heterojunctions. Chapter 3 Metal-Semiconductor Contacts. 3.1 Introduction. 3.2 Formation of Barrier. 3.3 Current Transport Processes. 3.4 Measurement of Barrier Height. 3.5 Device Structures. 3.6 Ohmic Contact. Chapter 4 Metal-Insulator-Semiconductor Capacitors. 4.1 Introduction. 4.2 Ideal MIS Capacitor. 4.3 Silicon MOS Capacitor. Part III Transistors. Chapter 5 Bipolar Transistors. 5.1 Introduction. 5.2 Static Characteristics. 5.3 Microwave Characteristics. 5.4 Related Device Structures. 5.5 Heterojunction Bipolar Transistor. Chapter 6 MOSFETs. 6.1 Introduction. 6.2 Basic Device Characteristics. 6.3 Nonuniform Doping and Buried-Channel Device. 6.4 Device Scaling and Short-Channel Effects. 6.5 MOSFET Structures. 6.6 Circuit Applications. 6.7 Nonvolatile Memory Devices. 6.8 Single-Electron Transistor. Chapter 7 JFETs, MESFETs, and MODFETs. 7.1 Introduction. 7.2 JFET and MESFET. 7.3 MODFET. Part IV Negative-Resistance and Power Devices. Chapter 8 Tunnel Devices. 8.1 Introduction. 8.2 Tunnel Diode. 8.3 Related Tunnel Devices. 8.4 Resonant-Tunneling Diode. Chapter 9 IMPATT Diodes. 9.1 Introduction. 9.2 Static Characteristics. 9.3 Dynamic Characteristics. 9.4 Power and Efficiency. 9.5 Noise Behavior. 9.6 Device Design and Performance. 9.7 BARITT Diode. 9.8 TUNNETT Diode. Chapter 10 Transferred-Electron and Real-Space-Transfer Devices. 10.1 Introduction. 10.2 Transferred-Electron Device. 10.3 Real-Space-Transfer Devices. Chapter 11 Thyristors and Power Devices. 11.1 Introduction. 11.2 Thyristor Characteristics. 1 1.3 Thyristor Variations. 11.4 Other Power Devices. Part V Photonic Devices and Sensors. Chapter 12 LEDs and Lasers. 12.1 Introduction. 12.2 Radiative Transitions. 12.3 Light-Emitting Diode (LED). 12.4 Laser Physics. 12.5 Laser Operating Characteristics. 12.6 Specialty Lasers. Chapter 13 Photodetectors and Solar Cells. 13.1 Introduction. 13.2 Photoconductor. 13.3 Photodiodes. 13.4 Avalanche Photodiode. 13.5 Phototransistor. 13.6 Charge-Coupled Device (CCD). 13.7 Metal-Semiconductor-Metal Photodetector. 13.8 Quantum-Well Infrared Photodetector. 13.9 Solar Cell. Chapter 14 Sensors. 14.1 Introduction. 14.2 Thermal Sensors. 14.3 Mechanical Sensors. 14.4 Magnetic Sensors. 14.5 Chemical Sensors. Appendixes. A. List of Symbols. B. International System of Units. C. Unit Prefixes. D. Greek Alphabet. E. Physical Constants. F. Properties of Important Semiconductors. G. Properties of Si and GaAs. H. Properties of SiO, and Si3N. Index.

Current gain and cutoff frequency falloff at high currents

Abstract: A theoretical and experimental study of the effects of high-level injection of carriers into a reverse-biased collector-base junction has been performed. Two models which describe the high-current behavior of the junction space-charge region are discussed. The first deals with the formation of a current-induced base region at space-charge-limited current densities. The second model assumes that two-dimensional effects are predominant; at current densities corresponding to the onset of space-charge-limited current, lateral injection of carriers takes place. These phenomena were studied experimentally using silicon double-diffused transistor structures. The existence of space-charge-limited current in the reverse-biased collector depletion layer manifests itself in significant changes in the ac and dc parameters of the transistor. In particular, it is shown that the cutoff frequency (f T ) and large-signal current gain (h FE ) begin to decrease rapidly with increasing current at the onset of the space-charge limitation. A comparison of experimental results with predictions of the above theories indicates that, while both the formation of a current-induced base region and lateral injection do take place, the latter mechanism controls conventional device performance.

Frequency and power limitations of Class-D transistor amplifiers

Abstract: The transition and saturation loss mechanisms of the two basic tuned Class-D amplifiers are studied in detail, as functions of drive waveform, signal frequency, and type of transistor. The charge control approach is used to derive optimum drive waveforms, together with approximate expressions for the various contributions to transition time that are verified experimentally. It is found that for high-frequency operation, the current-switching system using simple epitaxial transistors provides the highest output power with least likelihood of transistor failure, although with a somewhat lower efficiency than the voltage-switch. The voltage-switching system is found to be preferable when simple epitaxial transistors are not used. An example is given of a current-switching amplifier designed to deliver a continuous power of 1 kW at 500 kHz with an overall system efficiency of greater than 90 percent into a variable load.

Active Filters for UHF and Microwave Frequencies

Abstract: A technique is described for using transistors directly as high-Q inductors at microwave frequencies. Several experimental band-pass filters have been built and tested to verify usefulness of the inductive transistor circuit. Stable filters with unity insertion loss have been realized at UHF. Observations made during temperature cycling show that environmental stabilization can also be achieved. Analysis has been made of noise figure and nonlinear distortion, and supporting experimental data are provided. The inductive transistor circuit is expected to be practical for a variety of small-signal filtering and multiplexing applications.

Silicon-gate technology

Abstract: Silicon-gate technology provides an advantageous approach for implementing large-scale integrated arrays of field-effect transistors. Its advantages?principally resulting from the low threshold voltage and the self-aligned gate structure buried under an insulator?ease the problem of interfacing these circuits to bipolar integrated circuits and increase both their performance and functional density, making MOS integrated circuits easier and more economical to use. This article reviews recent progress with this technology and shows its application to the construction of complex digital functions as illustrated by a memory circuit.

Avalanche degradation of h FE

Abstract: Degradation of low current h FE as a result of avalanching the emitter-base junction of a silicon planar transistor is shown to be explinable by an increase in surface recombination velocity within the vicinity of the emitter-base metallurgical junction. This degradation mechanism manifests itself on a gate-controlled transistor by an additional peak in the plot of base current versus gate voltage. The magnitude as well as the "width" of this peak can be accounted for theoretically by assuming a given emitter-base impurity gradient and a localized increase in surface recombination velocity in and around the metallurgical junction. Experimental evidence is also presented for localized charge trapping within the oxide over the emitter-base junction as a result Of avalanching under an applied field.

Iterative scheme for 1- and 2- dimensional d.c.-transistor simulation

Abstract: A numerical iterative scheme is presented for the solution of the 1- and 2-dimensional semiconductor d.c. transport equations. This scheme is applied to an n-p-n transistor structure. Input data are geometry, doping profile, boundary conditions and, optionally, mobility dependencies and generation-recombination law.

Converter circuit having a controlled output

Abstract: An LC resonant circuit is alternately connected from DC input terminals to a winding on an output transformer via a pair of alternately operating switching transistors which turn on in synchronism with the resonant frequency of the LC circuit. Switching is accomplished when current flow through each transistor is substantially zero. The transistors are kept off for a selected period of time during each cycle of the LC circuit waveform, dependent upon a DC output voltage derived via rectification means from another winding on the output transformer. The frequency of operation of the circuit is responsive to the DC output voltage level for regulating the same.

Some network-theoretic properties of nonlinear DC transistor networks

Abstract: This paper extends, in several directions, some of the results of earlier work concerned with the existence and uniqueness of solutions of the dc equations of nonlinear transistor networks. In particular, here we develop techniques which enable us to deal directly with a more complicated transistor model.

Radiation-Induced Perturbations of the Electrical Properties of the Silicon-Silicon Dioxide Interface

Abstract: Interface-state densities and MOS transistor characteristics dependent upon such states have been studied as a function of radiation dose and type. Special MOS devices possessing doped silicon-dioxide layers as well as undoped "control" devices have been utilized. Infrared absorption measurements were performed on silicon-dioxide samples before and after exposure to radiation, as well as for doped and undoped samples. A model based on structural modifications of the silicon-dioxide-films is proposed for the build-up of interface-states resulting from exposure to radiation. It has been found that with the proper doping of the silicon-dioxide films, the build-up of such states can be reduced. Using such doped gate-dielectrics, planar semiconductor devices much less sensitive to radiation have been fabricated.

Minority carrier injection of metal-silicon contacts

Abstract: The minority carrier injection ratio from metal-silicon contacts has been measured using a metal-emitter transistor structure. Contacts of four different metals with barrier heights ranging from 0.65 to 0.85 eV on n -type silicon with doping level from 10 14 to 6 × 10 16 cm −3 were examined. This systematic investigation shows that the injection ratio at low current levels is a constant and is determined only by the barrier height of the contact and the doping of the semiconductor, while at high currents it increases with the total current. This result is in good agreement with theoretical predictions.

Complementary MOS—Bipolar transistor structure

Abstract: Bipolar transistors can be used to increase the driving capabilities of complementary MOS transistors while retaining the low power dissipation feature. The fabrication of n-p-n bipolar transistors is compatible with the fabrication of the complementary MOS transistors in a monolithic structure. Common collector n-p-n transistors can be fabricated using a diffused n+source-drain region as emitter, a diffused p-isolation region as base and an n-substrate as collector with a h fe greater than 100. Lateral n-p-n transistors can be fabricated using a diffused n+source-drain region as emitter and collector, and p-isolation region as base with a h fe greater than 10.

Rectifier using low saturation voltage transistors

Abstract: A circuit is employed utilizing the low collector-emitter voltage of a saturated transistor to obtain more efficient rectification of an alternating current supply than is achieved by a diode. A regenerative feedback circuit to the base of the transistor is provided so that once collector-to-emitter current is initiated, current is fed back to the base of the transistor to further drive the transistor into its conducting condition. However, since transistors may operate in a reverse direction when the load voltage is greater than that of the power supply, such regenerative feedback circuit is employed in series with the saturated transistor whereby any reverse collector current due to inverted operation causes the base of such transistor to be cut off, preventing any undesired reverse transistor operation.

The realization of a GaAs—Ge wide band gap emitter transistor

Abstract: The fabrication and properties of an n-GaAs emitter, p-Ge base, n-Ge collector transistor which possesses significant current gain is described, These GaAs wide band gap emitter transistors have shown incremental current gains near 15 when operated at current densities up to 3500 A/cm2. The doping level used in the base region was quite high (up to 5×1019/cm3in order to avoid a spurious Ge p-n junction in this region. The epitaxial deposition of the GaAs emitter region was carried out at a low temperature in order to also avoid a hidden p-n Ge junction. The low deposition temperature resulted in low (about 5×1015/cm3emitter doping levels. The general nature of the GaAs-Ge heterojunction energy-band diagram permits this high doping in the base or Ge region relative to the GaAs emitter region without reducing the current gain below unity. The observation of gain in this n-p-n heterojunction structure where the emitter is much more lightly doped than the base is considered to be confirmation of the theoretical proposals of Shockley and Kroemer.

Two-terminal bipolar self-powered low current limiter

Abstract: A two-terminal, bipolar, self-powered low current limiter having particularly advantageous use for limiting currents in body electrodes connected to biomedical electronic equipment to the microampere range. In one embodiment of the invention, a pair of series connected field effect transistors form a bipolar current limiting device. In another embodiment of the invention, four field-effect transistors are provided in the form of two series connected bistable devices. In both cases, an additional pair of field-effect transistors can be used to increase the breakdown voltage in both directions.

Semiconductor device having surface electric-field effect

Abstract: A semiconductor device comprising a semiconductor, an insulating layer and a resistive or half conducting layer which are provided on the surface of said semiconductor, and a metallic electrode adjoined to said latter layers and having such a surface electric-field effect as that any potential distribution is established on said insulating layer, said effect causing multiplication and increase of the functional ability of the semiconductor device, whereby for example, effective utilization of the device as an amplifier comprising a high frequency, surface electric-field effect transistor, a high speed switching transistor or tetrode is made possible.

Field effect transistor

Abstract: An insulated gate field effect transistor having a narrow channel made by double diffusion. The double-diffused MIS transistor has a buried layer of high impurity concentration beneath the channel region except the portions of the drain contact region or drain electrode. The buried layer of high impurity concentration is of the same impurity as that of the channel region and is so located that the channel-spreading resistance is drastically reduced while the capacitance between the drain and the channel is maintained as small as possible.

Integrated timer with nonvolatile memory

Abstract: A remote settable electronic circuit timer system is described using an integrated MOS counter supplemented by an integrated programmable decoder consisting of MNOS transistors. Charge storage in the dielectric of the MNOS transistors is used to achieve memory without power. The setting information is counted into the counter at an accelerated rate and then transferred into the decoder, which serves as a memory. At the start of the timing operation, the counter is reset to zero. Then the counter counts up and when coincidence with the number stored in the decoder is achieved, an output signal is generated. The system automatically adjusts the setting for deviations of the oscillator frequency from its nominal value. Also, during the setting operation, all circuits of the timer are checked for proper functioning.

Control system for blocking fuel injection in an internal combustion engine

Abstract: Opening pulses for fuel injectors are furnished by a multivibrator. The pulses are applied to a resistance-capacitance network which furnishes a negative pulse having an amplitude which varies with the speed and the temperature of the engine. This signal is applied to the base of a switching transistor whose bias is controlled by the accelerator pedal. The collector of the switching transistor is connected to the base of an auxiliary transistor, whose collector is connected by means of a feedback resistance to the base of the switching resistor. The opening pulse is also applied to the base of the auxiliary transistor by means of a series resistance-capacitance circuit. Blocking of the auxiliary transistor causes transmission of the opening pulse to the injector. The auxiliary transistor blocks only upon simultaneous conduction of the multivibrator furnishing the opening pulse and the switching transistor. The circuit is arranged to block the transmission of the opening pulses in case of speeds exceeding the idling speed while the accelerometer pedal is not depressed.

Thin-film silicon: Preparation, properties, and device applications

Abstract: This paper will review the properties of thin silicon films deposited on sapphire (SOS) and magnesium aluminate spinel by the pyrolysis of silane in the temperature range 900-1200°C. Variations of carrier mobility, free-carrier concentration, minority carrier lifetime, crystalline perfection, and surface quality will be discussed as a function of substrate crystal and growth parameters. MOS transistors exhibiting field-effect mobility close to that obtained with bulk silicon have been fabricated and a complementary MOS transistor memory cell has been constructed with a WRITE-READ delay of 6 ns. The standby power for the cell is typically 10 µW. Other CMOS circuits display a pair-delay of 1.5-2.0 ns. AIl-epitaxial bipolar transistors with a current gain of 5 and f T of 350 MHz have been made in which all layers are sequentially deposited during one high-temperature operation. Recent improvements in bipolar fabrication techniques have lead to current gains as high as 25 at 10 mA.

The effect of strain on MOS transistors

Abstract: The effect of mechanical strain on the characteristics of MOS transistor structures has been measured. A strip of silicon cut from an array of MOS transistors on a slice was made into a cantilever and vibrated at about 60 Hz. The change in the device characteristics could be due to a variation in mobility or turn on voltage, but by careful investigation around the threshold of conduction it was concluded that the chief cause is due to mobility variation. This change in the mobility and hence the β of the transistor is consistent with a piezoresistive effect in the channel, the overall change in conductivity being some 50 times greater than that expected by simple geometric distortion. The piezoresistive effect in MOS structures can give rise to a change in the device characteristics due to strain built in during fabrication. This could lead to an undesirable situation in large scale arrays. Alternatively it is possible to propose using the strain sensitivity for a strain gauge and novel circuits for this purpose might be devised.

Transformerless power supply

Abstract: The power supply circuit receives as an input an AC line voltage, rectifies the line voltage to DC and transforms the voltage downwardly to a much lower level. No transformer is employed but rather the power supply circuit includes a plurality of capacitors which are charged in series by the line voltage and discharged in parallel across the load. The charging and discharging is controlled by a diode and transistor connected to each capacitor and to each other so that the diode conducts during the charging and then maintains the transistor nonconductive and the transistor conducts during the discharge when the diode is nonconductive.

Transistor having emitter with high circumference-surface area ratio

Abstract: A transistor comprising a unitary emitter having a plurality of perforations therein and a unitary base, portions of which extend through openings in the emitter, to thereby form a transistor having an emitter with a high ratio between its circumference and surface area.

Semiconductor memory apparatus with a multilayer insulator contacting the semiconductor

Abstract: An electronic memory apparatus is disclosed in which the memory element is an insulated gate field effect transistor (IGFET) whose gate contains a metal electrode located on top of two parallel layered insulators, such as silicon oxide and zinc sulfide. The memory of a signal voltage applied to the gate electrode is provided by the phenomenon of tunneling of electrical charges between the metal electrode and the interface between the two insulator layers. These charges are trapped at this interface until a voltage of opposite sign is applied which is sufficient to discharge (''''erase'''' ) the trapped charges at the interface. Nondestructive readout of the presence or absence of these trapped charges is afforded by monitoring the sourcedrain current in the transistor.

Conductor-insulator-semiconductor fieldeffect transistor with semiconductor layer embedded in dielectric underneath interconnection layer

Abstract: A conductor-insulator-semiconductor field-effect transistor has semiconductor layers embedded in the dielectric underneath the interconnection layers in order to prevent unwanted parasitic inversion layers, due to voltages and currents in the interconnection layers, from causing deterioration in device operation.

Switching and storage characteristics of MIS memory transistors

Abstract: Transistors with memory hawe been constructed in the form of MIS field-effect transistors in which the gate insulator consists of a double layer. Closest to the silicon is a silicon dioxide layer, no more than 15A thick. The importance of this layer will be discussed. It is covered by another layer, which may be silicon nitride, 200-800A thick. Aluminum oxide and silicon dioxide have also been tried as the second layer. At the interface between these two insulator layers, and at an energy level inside the silicon forbidden band, are traps with a density as high as 2×1014cm-2in the form of disorder states. These traps are donor type and may each give off an electron when the silicon is biased positively for a short time with respect to the insulator, turning the transistor ON. When the polarity is reversed the electrons are recaptured by the traps, neutralizing them and turning the transistor OFF. The charge transport is by tunneling.

Power supply control apparatus

Abstract: In the event a primary voltage source fails, an auxiliary voltage source may be provided to a load by a battery and an isolating transistor that conducts current to the load from the battery. The isolating transistor is controlled by a first control circuit that causes the transistor to conduct if the voltage produced by the primary voltage source decreases below a predetermined value. The isolating transistor is also controlled by a second control circuit that returns the isolating transistor to its nonconductive state if the voltage produced by the battery decreases below a predetermined value. Both the first and second control circuits preferably comprise a Zener diode and a resistor.

Computer-aided design and characterization of digital MOS integrated circuits

Abstract: A computer-aided circuit-simulation method is developed to enable the design, characterization, and optimization of MOS integrated circuits. The computation of dc and transient characteristics is done in terms of physical device parameters extracted from processing information and incorporated in an analytical device model. It is demonstrated that any MOS circuit configuration (with its associated series resistances and parasitic devices) can be analyzed in terms of an equivalent inverter. Input-output transfer characteristics are obtained by superposition of the load and transistor I-V characteristics, providing the necessary information for dc > `worst-case' design. A simple device model was used to compute circuit transient response. All the computed characteristics are in good agreement with measurements performed on integrated circuits.

Monolithic semiconductor memory

Abstract: This specification discloses a storage cell which employs inversely operated and transverse transistors to reduce storage cell size accessing times and power consumption when the cell is fabricated in monolithic form. Two cross-connected transistors are inversely operated so that they share a common emitter region with a separate base region and collector region for each of the cross-connected transistors. In this way, the transistors can be fabricated in a single diffusion region. The collector of each of the cross-connected transistors is connected to the collector of a load transistor of the opposite type transistor and to the base of an addressing transistor having its emitter connected to the sense line and its collector connected to the base of the load transistors. The two addressing and load transistors are formed in a single isolation zone with collector and base regions of the addressing transistors serving also as the base and collector regions respectively of the load transistors which are fabricated as transverse transistors with a common emitter region.

Pulse type drive circuit for an inductive load

Abstract: A pulse-type drive circuit, for an inductive load such as a winding of a stepping motor, comprises a power supply having one terminal connected, through a first transistor, to a first terminal of the inductive load. The second terminal of the inductive load is connected through a transistor switch, and in series with a current-sensing resistor, to ground. A Schmitt trigger controls conductivity of the transistor switch. A trigger pulse is applied to the first transistor and to the Schmitt trigger, whereby the first transistor and the transistor switch are made conductive to energize the inductive load. When the current in the inductive load reaches a certain level, the current-sensing resistor actuates the Schmitt trigger to block the transistor switch. The first terminal of the inductive load is connected to ground through a blocking diode, and the second terminal is connected to the power supply through a back biased diode. When the load current is interrupted by blocking of the transistor switch, the power in the inductive load is transferred back to the power supply. The power supply may include a high voltage source connected to the first transistor and a low voltage source connected to the first terminal of the inductive load, with the first transistor being triggered by a ''''turn on'''' pulse. The drive circuit may be modified to energize a winding of a stepping motor in opposite directions throughout its entire length and a constant current feedback circuit may be included in the drive circuit.