Showing papers on "Transistor published in 1973"

A two-dimensional mathematical model of the insulated-gate field-effect transistor

Abstract: This paper is concerned with the mathematical details of a numerical model of the insulated-gate field-effect transistor; a computer-aided analysis of the device, based on this model, appears separately A finite-difference scheme is presented for obtaining an approximate solution of a system of nonlinear elliptic partial differential equations describing the carrier distribution in such a device model In particular, our scheme allows the device current, as a function of the applied bias voltages, to be reliably calculated The results of numerical experiments appraising the accuracy of the method are also included

Electronic Principles

Abstract: The new edition of Electronic Principles provides the clearest, most complete coverage for use in courses such as Electronic Devices, Linear Electronics, and Electronic Circuits. It's been updated to keep coverage in step with the fast-changing world of electronics. Yet, it retains Malvino's clear writing style, supported throughout by abundant illustrations and examples. Table of contents 1 Introduction 2 Semiconductors 3 Diode Theory 4 Diode Circuits 5 Special Purpose Diodes 6 Bipolar Transistors 7 Transistor Fundamentals 8 Transistor Biasing 9 AC Models 10 Voltage Amplifiers 11 Power Amplifiers 12 Emitter Follower 13 JFETs 14 MOSFETs 15 Thyristors 16 Frequency Effects 17 Differential Amplifiers 18 Operational Amplifiers 19 Negative Feedback 20 Linear OP-AMP Circuits 21 Active Filters 22 Nonlinear OP-AMP Circuits 23 Oscillators 24 Regulated Power Supplies Appendix A (Data Sheets) Appendix B Mathematical Derivations Glossary Answers to Odd-Numbered Problems Index

Subthreshold design considerations for insulated gate field-effect transistors

Abstract: A knowledge of subthreshold behavior in an insulated gate field-effect transistor is important for circuits with low leakage specifications. This paper discusses the effect of drain voltage on the subthreshold region as the channel length becomes shorter, the effect of substrate bias on both the shift in and the slope of the subthreshold curves, and the effect of temperature on the subthreshold current characteristics. It is shown that all these effects can be incorporated into a simple one-dimensional model.

High current regimes in transistor collector regions

Abstract: The falloff of transistor gain and cutoff frequency at high currents is a familiar phenomenon. We show here, for the case of transistors having epitaxial collectors, how the mechanism responsible for the falloff depends upon device operating conditions. At any V cb , a current can be calculated above which falloff begins. If the magnitude of V cb is lower than a critical value V crit , falloff will occur because the transistor enters a saturation or quasi-saturation mode of operation. If the magnitude of V cb is greater than V crit , falloff will occur because the transistor enters a mode of operation associated with space-charge-limited flow. We illustrate the usefulness of this description in understanding observed device behavior, and show how it enables a new interpretation to be given to experimental results previously reported. Important implications for transistor modeling are also discussed.

Calculation of the emitter efficiency of bipolar transistors

Abstract: The emitter efficiency of a bipolar transistor is calculated taking heavy doping effects such as impurity band formation and band tailing into account. It is shown that in most cases these effects, rather than the minority carrier lifetime in the emitter are limiting the transistor current gain. This allows us to define an effective emitter impurity profile for use in current transport calculations. The influence of the emitter and base impurity profiles upon the gain is studied, and experimental results are presented showing that the knowledge of the impurity profiles is sufficient to predict the one-dimensional current gain.

Precision differential voltage--current convertor

Abstract: A new differential voltage--current convertor is proposed, which achieves high linearity and is substantially temperature independent. The effects of transistor mismatches and of limited current gain are analysed. Experimental results are given which show a considerable improvement over previous circuits.

A two-dimensional numerical analysis of a silicon N-P-N transistor

Abstract: First-order transistor theory leads to conclusions that do not compare well with experimental results obtained for today's transistors fabricated with sophisticated technology. In an effort to overcome this situation, Gummel [1] for the first time used a digital computer to give a unified exact treatment of one-dimensional device performance. This paper treats the two-dimensional case that must be considered in order to account for lateral current effects. A set of 3 nonlinear partial differential equations describing the flow of carriers within the transistor under steady-state conditions is formulated and solved iteratively. The potential distribution and the hole and electron distribution within the transistor are calculated, and two-dimensional plots of these quantities are given.

Lsi chip construction and method

Abstract: LSI chip construction having a semiconductor body with a plurality of transistors formed in the semiconductor body in a predetermined pattern and a plurality of resistors formed in a semiconductor body in a predetermined pattern. Means is provided which includes two layers of metallization having input and output pads adjacent the outer perimeter of the body and contacting said transistors and resistors to form a plurality of emitter-follower circuits with certain of the emitter-follower circuits being made up of larger transistors and being located near the perimeter of the chip and near the input-output pads. The other emitter coupled circuits are clustered in groups to form an array of such groups with each of the groups being capable of containing a plurality of logic circuits.

Inadequacy of the classical theory of the MOS transistor operating in weak inversion

Abstract: The most important characteristics of the MOS transistor operating in weak inversion are discussed. When the drain voltage is greater than a few kT/q it is demonstrated that the drain current can be written as the product of the geometrical factor W/L , the minority carrier diffusion constant, and the inversion charge at the source. In the classical theory, the slope of the In I D versus V G curve is only influenced by the capture of minority carriers by surface states. It is demonstrated that the N ss values obtained from these current measurements are in disagreement with the values found by independent surface states measuring techniques.

Low-level MOS transistor amplifier using storage techniques

Abstract: A fully integrated analog amplifier which can be used in a variety of applications either as a single element or as a cell in a LSI circuit has been developed for such applications as temperature measurements associated with thermocouples, biomedicine, low-level measurements and A/D converters

Method for manufacturing semiconductor device

Abstract: A method for manufacturing a semiconductor device such as an integrated circuit or a discrete transistor includes a step of forming beam-leads to permit chips to be face-up bonded to a substrate, the beam-leads in a certain chip expanding to the neighboring chip across the boundary between said two chips.

Transistor design and thermal stability

Abstract: A model has been developed for the computation of forward second breakdown due to lateral thermal instability in power transistors. The method of analysis is to derive the steady-state current density and temperature distribution of a given transistor design under specified operating conditions, and then to calculate the response of the device to a temperature impulse suddenly applied internally. The current flow calculations have been carried out by using a distributed transistor model, and for the time-dependent heat flow problem the finite difference approach was used. The effect of device design parameters such as chip thickness, base width, emitter width, base impurity concentration, etc., on the thermal stability has been calculated. Also, the effect on transistor stability of the current and voltage operating point, as well as the heat sink temperature, has been analyzed. Information on the stability of a power transistor under pulsed condition is derived by calculating the time constant for thermal runaway. The results of this analysis indicate that the delay time is of the order of 1 ms.

Stabilized power supply with transformer isolation

Abstract: A storage capacitor, periodically charged through a chopping transistor via an inductance which during cutoff of the transistor maintains the flow of charging current by way of a diode, energizes an output terminal through a d-c/a-c converter, a transformer and a rectifier in tandem therewith. A sensor responsive to the voltage (or current) on that terminal feeds one input of an analog-type first differential amplifier whose other input receives a constant reference voltage (or current) and whose output constitutes an error signal. A binary-type second differential amplifier compares this error signal with the output of a sawtooth-wave generator and, on detecting a coincidence therebetween, energizes a differentiation circuit which generates a turn-on pulse for the switching transistor; a turn-off pulse for that transistor is periodically produced by a gating circuit which also triggers the sawtooth-wave generator. Two pulse transformers galvanically separate the gating circuit and the switching transistor from the sawtooth-voltage generator and the associated amplifier and differentiation circuit.

Distortion analysis of bipolar transistor circuits

Abstract: In the design of long-haul analog communication systems, it is essential to understand the nonlinear distortion behavior of the electronic circuit realization. Distortion analysis of weakly nonlinear circuits has been developed based on the well-known perturbation method. In the frequency domain, the nonlinearities of a transistor are shown to be equivalently represented by intermodulation distortion sources whose amplitudes and phases are iteratively determined by the linear circuit characteristics and the Taylor-series coefficients associated with the nonlinearities. For all practical purposes, only two iterations are sufficient to yield accurate results. An algorithm for computing the second- and third-order intermodulation distortions is described. This algorithm has been implemented in a program called NODAP (nonlinear distortion analysis program). NODAP computes the smallsignal nonlinear transistor model from the recently developed integral change-control model (ICM). It then passes this information through a linear circuit analysis program for distortion computations. Computer results for several transistor circuits using Western Electric highfrequency transistors are all in excellent agreement with the measured data over a wide range of bias conditions and frequencies. This demonstrates the validity of the approach treated in the paper.

Semiconductor thermal protection

Abstract: To prevent excessive semiconductor junction temperatures, thermally responsive impedances are mounted in heat transfer contact with the semiconductor device. Various combinations of impedances including positive and negative temperature coefficient thermistors, semiconductor diodes, transistors and thyristors are located in electrical series or shunt circuits which disable current flow through an adjacent semiconductor junction when the temperature thereof exceeds predetermined values. Load circuits in series with a thermally protected semiconductor device are protected from excessive load currents which might damage the load and/or the semiconductor device.

Dimming circuit with saturated semiconductor device

Abstract: A fluorescent lamp is operated by a-c pulses having a pulse length sufficiently short that the lamp acts like slightly positive impedances A pulse modulator which produces the pulses has a power transistor biased to saturation However, varying the base drive of the saturated transistor causes a generally linear change in tube current to permit tube dimming and control A servo circuit provides feedback control of the base drive to automatically compensate for variable effects to maintain constant tube lighting Tube dimming is obtained by adjusting the feedback circuits of the servo

Composite transistor device with over current protection

Abstract: The base-emitter junctions of a power transistor and an auxiliary transistor are paralleled. The smaller collector current of the auxiliary transistor can be sampled so as to indirectly sample the larger collector current of the power transistor. When the indirect sampling indicates that the collector current in the power transistor is tending to exceed its rated maximum value, its base and emitter electrodes are clamped. This prevents increase in the base-emitter potential of the power transistor and consequently increase of its collectorto-emitter current.

IGFET with gate protection diode and antiparasitic isolation means

Abstract: Described are insulated gate-type field effect transistors used in capacitive memory circuits and having protective diodes for protecting the insulating films below the gate electrodes from electrical breakdown, in which parasitic transistor action which might be caused by minority carriers injected into semiconductor substrates by noise signals applied to the protective diodes are eliminated by means for suppressing injection of minority carriers or by means for preventing injected minority carriers from reaching the drain regions of the field effect transistors.

Transient turn-on protection circuit for power supplies

Abstract: A protection circuit for a transistor switching regulator type power supply which prevents damage to the regulating transistor upon initial application of power to the system. The normal feedback control signal pulses used to control the "on-time" of the regulating transistor are combined with second control signal pulses whose pulse width increases as a function of time during a predetermined interval such that the regulating transistor will initially conduct for an extremely short period of time, but for longer and longer periods as time preogresses until the output voltage from the regulator circuit is within the regulation band provided by the normal feedback control circuit.

Optimum design of power transistor switches

Abstract: An optimization procedure is developed that completely specifies the one-dimensional design of a double-diffused transistor with only two pieces of input data required--the collector-emitter sustaining voltage and the current gain required when the device is operating in the region of quasi-saturation. A simple but experimentally validated model for predicting h FE versus I C is also developed and used in the optimization procedure. The analysis is intended to apply mainly to the case of high-voltage high-current switching transistors that have a lightly doped collector. Several design examples are given that illustrate the optimization procedure. In the first example it is shown that the emitter area can be minimized, while simultaneously meeting both the H FE and BV CEO specifications. This result is of economic significance, since it results in the minimization of die size, and hence die cost. Other examples are given that illustrate various extensions of the procedure.

Current limiting circuit

Abstract: A current sense voltage is derived which is proportional to the current to be limited. The current sense voltage is applied in phase opposition to a difference voltage obtained by opposing the base-to-emitter diode voltage drops of a temperature compensating transistor and a current control transistor for substantially reducing the value of the current limit sense voltage necessary to cause current limiting. Temperature compensation is obtained by superimposing a selected temperature compensating portion of the base-to-emitter diode drop of a temperature compensating transistor on the base-to-emitter turnon voltage of the current control transistor, whereby any desired temperature coefficient including zero is obtained for the current limiting circuit over the operating temperature range of - 55* C to + 125* C.

Computer-Aided Design and Graphics Applied to the Study of Inductor-Energy -Storage Dc-to-Dc Electronic Power Converters

Abstract: A series of nine programs are developed for the design of the inductors of single-winding flyback converters. Three converter types are considered: voltage step-up, current step-up, and voltage step-up/current step-up. For each of the converter types, three pulse modulators are considered: constant frequency, constant transistor on-time, and constant transistor off-time. Computer-graphics displays are used to assist in evaluating characteristics of the various converter-modulator combinations.

Application of facet-growth to self-aligned schottky barrier gate field effect transistors

Abstract: A semiconductor device and particularly a self-aligned Schottky barrier gate field-effect transistor is made by epitaxial growth of facets corresponding to the source and drain regions on a surface of a semiconductor body through spaced apart preferably elongated windows in a masking layer and overgrowing edge portions of the masking layer at the windows to form overgrown portions on the facets. The channel region of the transistor is previously formed in the semiconductor body, preferably by epitaxial growth of a layer on a surface of a semiconductor body having a semi-insulating layer adjoining the surface. After removal of the masking layer, the Schottky barrier gate is self-aligned by deposition of metal on the unshielded portions of the planar surface between the facets.

Multilayered vertical transistor having reach-through isolating contacts

Abstract: Logic circuits for performing the INVERTER and NOR functions, and monolithic integrated structures for realizing the circuits. The basic circuit comprises PNP transistor and an NPN transistor. The emitter of the PNP transistor has its base grounded and its collector connected to the base of the NPN transistor having its emitter grounded. The logic signal input is at the base of the NPN transistor. The output is taken at the collector of the NPN transistor and is the inverse of the input. Two such basic circuits are interconnected to provide the NOR function.

The Surface Oxide Transistor (SOT)

Abstract: A new type of surface barrier transistor has been investigated in which two junctions are employed each consisting of a thin conducting oxide or insulator between a metal and a semiconductor. The transistor behaviour of a structure composed of two such MIS contacts and a third base contact has been studied as a function of oxide thickness and contact separation distance. Two distinct classes of transistor action are observed each depending on a different mechanism of current transfer through the insulator of the individual formed diodes. The distinguishing feature between these two classes was found to be common base current gain, hFB. Devices characterized by hFB > 1 were noted to involve current conduction through the oxide via tunneling processes while those with hFB

Method for manufacturing ion implanted insulated gate field effect semiconductor transistor devices

Abstract: A method for manufacturing insulated gate field effect transistor devices utilizing ion implantation for elimination and suppression of mobile ion contamination is described and comprises bombarding and implanting hydrogen or helium into the dielectric insulating layer of an insulated gate field effect transistor at relatively low ion energy, followed by a comparatively low temperature anneal.

High voltage power transistor and method for making

Abstract: High voltage power transistor and method for making in which a first or junction wafer, containing inner and outer collector layers surmounted by a base layer topped by spaced emitter regions, is bonded to a reinforcing substrate or carrier wafer, preferably with a metallic alloy bond. The junction wafer is then grooved between emitter regions to form mesas each containing a transistor collector, base, and emitter region, the grooves extending almost entirely through the lowermost collector layer but the carrier wafer preventing the junction wafer from collapsing. While supporting the grooved junction wafer by means of the carrier wafer, the sidewalls and bottoms of the grooves are simultaneously coated with a glass passivant, and the bonded wafers are then subdivided at the grooves to form a plurality of individual transistors.

Semiconductor pressure transducer employing novel temperature compensation means

Abstract: A semiconductor pressure transducer having a cavity with one thin wall diaphragm on which a piezoresistive bridge is formed of four resistors diffused into the thin wall semiconductor diaphragm and coupled together as a Wheatstone bridge, a voltage regulator including a zener diode coupled to the bridge, and a pair of nVBE circuits coupled to the bridge and the regulator circuit for temperature compensation of the bridge and regulators over the operating temperature range, each of said nVBE circuits comprising a transistor and two associated resistors connected so as to provide an irrational number of VBE voltage drops for temperature compensation.

Efficient computer simulation of distortion in electronic circuits

Abstract: A general-purpose electronic-circuit simulation program is employed to efficiently compute second- and third-order distortion due to weak nonlinearities in bipolar junction transistor (BJT) circuits of arbitrary complexity. The method is based on the Volterra-series representation of the electronic circuit and is valid at all frequencies. The transistors are represented by a simple modified Ebers-Moll model, and the adjoint-network concept is employed to efficiently compute the contribution of each nonlinearity in the circuit to the distortion at the output. The method is illustrated with a practical electronic-circuit example.