Showing papers on "Transistor published in 2020"

The future of ferroelectric field-effect transistor technology

Abstract: The discovery of ferroelectricity in oxides that are compatible with modern semiconductor manufacturing processes, such as hafnium oxide, has led to a re-emergence of the ferroelectric field-effect transistor in advanced microelectronics. A ferroelectric field-effect transistor combines a ferroelectric material with a semiconductor in a transistor structure. In doing so, it merges logic and memory functionalities at the single-device level, delivering some of the most pressing hardware-level demands for emerging computing paradigms. Here, we examine the potential of the ferroelectric field-effect transistor technologies in current embedded non-volatile memory applications and future in-memory, biomimetic and alternative computing models. We highlight the material- and device-level challenges involved in high-volume manufacturing in advanced technology nodes (≤10 nm), which are reminiscent of those encountered in the early days of high-K-metal-gate transistor development. We argue that the ferroelectric field-effect transistors can be a key hardware component in the future of computing, providing a new approach to electronics that we term ferroelectronics. This Perspective examines the use of ferroelectric field-effect transistor technologies in current embedded non-volatile memory applications and future in-memory, biomimetic and alternative computing models, arguing that the devices will be a key component in the development of data-centric computing.

Large-scale flexible and transparent electronics based on monolayer molybdenum disulfide field-effect transistors

Abstract: Atomically thin molybdenum disulfide (MoS2) is a promising semiconductor material for integrated flexible electronics due to its excellent mechanical, optical and electronic properties. However, the fabrication of large-scale MoS2-based flexible integrated circuits with high device density and performance remains a challenge. Here, we report the fabrication of transparent MoS2-based transistors and logic circuits on flexible substrates using four-inch wafer-scale MoS2 monolayers. Our approach uses a modified chemical vapour deposition process to grow wafer-scale monolayers with large grain sizes and gold/titanium/gold electrodes to create a contact resistance as low as 2.9 kΩ μm−1. The field-effect transistors are fabricated with a high device density (1,518 transistors per cm2) and yield (97%), and exhibit high on/off ratios (1010), current densities (~35 μA μm−1), mobilities (~55 cm2 V−1 s−1) and flexibility. We also use the approach to create various flexible integrated logic circuits: inverters, NOR gates, NAND gates, AND gates, static random access memories and five-stage ring oscillators. Wafer-scale monolayers of MoS2 can be used to create flexible transistors and circuits that exhibit on/off ratios of 1010, current densities of ~35 μA μm−1 and mobilities of ~55 cm2 V−1 s−1.

Reconfigurable logic and neuromorphic circuits based on electrically tunable two-dimensional homojunctions

Abstract: Reconfigurable logic and neuromorphic devices are crucial for the development of high-performance computing. However, creating reconfigurable devices based on conventional complementary metal–oxide–semiconductor technology is challenging due to the limited field-effect characteristics of the fundamental silicon devices. Here we show that a homojunction device made from two-dimensional tungsten diselenide can exhibit diverse field-effect characteristics controlled by polarity combinations of the gate and drain voltage inputs. These electrically tunable devices can achieve reconfigurable multifunctional logic and neuromorphic capabilities. With the same logic circuit, we demonstrate a 2:1 multiplexer, D-latch and 1-bit full adder and subtractor. These functions exhibit a full-swing output voltage and the same supply and signal voltage, which suggests that the devices could be cascaded to create complex circuits. We also show that synaptic circuits based on only three homojunction devices can achieve reconfigurable spiking-timing-dependent plasticity and pulse-tunable synaptic potentiation or depression characteristics; the same function using complementary metal–oxide–semiconductor devices would require more than ten transistors. A homojunction device made from two-dimensional tungsten diselenide can be used to create circuits that exhibit multifunctional logic and neuromorphic capabilities with simpler designs than conventional silicon-based systems.

Doping-free complementary WSe2 circuit via van der Waals metal integration.

Abstract: Two-dimensional (2D) semiconductors have attracted considerable attention for the development of ultra-thin body transistors. However, the polarity control of 2D transistors and the achievement of complementary logic functions remain critical challenges. Here, we report a doping-free strategy to modulate the polarity of WSe2 transistors using same contact metal but different integration methods. By applying low-energy van der Waals integration of Au electrodes, we observed robust and optimized p-type transistor behavior, which is in great contrast to the transistors fabricated on the same WSe2 flake using conventional deposited Au contacts with pronounced n-type characteristics. With the ability to switch majority carrier type and to achieve optimized contact for both electrons and holes, a doping-free logic inverter is demonstrated with higher voltage gain of 340, at the bias voltage of 5.5 V. Furthermore, the simple polarity control strategy is extended for realizing more complex logic functions such as NAND and NOR.

Sensitive pressure sensors based on conductive microstructured air-gap gates and two-dimensional semiconductor transistors

Abstract: Microscopic pressure sensors that can rapidly detect small pressure variations are of value in robotic technologies, human–machine interfaces, artificial intelligence and health monitoring devices. However, both capacitive and transistor-based pressure sensors have limitations in terms of sensitivity, response speed, stability and power consumption. Here we show that highly sensitive pressure sensors can be created by integrating a conductive microstructured air-gap gate with two-dimensional semiconductor transistors. The air-gap gate can be used to create capacitor-based sensors that have tunable sensitivity and pressure-sensing range, exhibiting an average sensitivity of 44 kPa−1 in the 0–5 kPa regime and a peak sensitivity up to 770 kPa−1. Furthermore, by employing the air-gap gate as a pressure-sensitive gate for two-dimensional semiconductor transistors, the pressure sensitivity of the device can be amplified to ~103–107 kPa−1 at an optimized pressure regime of ~1.5 kPa. Our sensors also offer fast response speeds, low power consumption, low minimum pressure detection limits and excellent stability. We illustrate their capabilities by using them to perform static pressure mapping, real-time human pulse wave measurements, sound wave detection and remote pressure monitoring. Pressure sensors with a sensitivity of ~103−107 kPa−1, as well as rapid response speeds, low power consumption and excellent stability, can be created by integrating a conductive microstructured air-gap gate with two-dimensional semiconductor transistors.

Evaporated tellurium thin films for p-type field-effect transistors and circuits

Abstract: There is an emerging need for semiconductors that can be processed at near ambient temperature with high mobility and device performance. Although multiple n-type options have been identified, the development of their p-type counterparts remains limited. Here, we report the realization of tellurium thin films through thermal evaporation at cryogenic temperatures for fabrication of high-performance wafer-scale p-type field-effect transistors. We achieve an effective hole mobility of ~35 cm2 V-1 s-1, on/off current ratio of ~104 and subthreshold swing of 108 mV dec-1 on an 8-nm-thick film. High-performance tellurium p-type field-effect transistors are fabricated on a wide range of substrates including glass and plastic, further demonstrating the broad applicability of this material. Significantly, three-dimensional circuits are demonstrated by integrating multi-layered transistors on a single chip using sequential lithography, deposition and lift-off processes. Finally, various functional logic gates and circuits are demonstrated.

Thickness-controlled black phosphorus tunnel field-effect transistor for low-power switches

Abstract: The continuous down-scaling of transistors has been the key to the successful development of current information technology. However, with Moore’s law reaching its limits, the development of alternative transistor architectures is urgently needed1. Transistors require a switching voltage of at least 60 mV for each tenfold increase in current, that is, a subthreshold swing (SS) of 60 mV per decade (dec). Alternative tunnel field-effect transistors (TFETs) are widely studied to achieve a sub-thermionic SS and high I60 (the current where SS becomes 60 mV dec–1)2. Heterojunction (HJ) TFETs show promise for delivering a high I60, but experimental results do not meet theoretical expectations due to interface problems in the HJs constructed from different materials. Here, we report a natural HJ-TFET with spatially varying layer thickness in black phosphorus without interface problems. We have achieved record-low average SS values over 4–5 dec of current (SSave_4dec ~22.9 mV dec–1 and SSave_5dec ~26.0 mV dec–1) with record-high I60 (I60 = 0.65–1 μA μm–1), paving the way for application in low-power switches. Tunnel field-effect transistors with spatially varying layer thickness in black phosphorus enable high performance with a record-low subthreshold swing.

Flexible Electronics: Status, Challenges and Opportunities

Abstract: The concept of flexible electronics has been around for several decades. In principle, anything thin or very long can become flexible. While cables and wiring are the prime example for flexibility, it was not until the space race that silicon wafers used for solar cells in satellites were thinned to increase their power per weight ratio, thus allowing a certain degree of warping. This concept permitted the first flexible solar cells in the 1960s (Crabb and Treble, 1967). The development of conductive polymers (Shirakawa et al., 1977), organic semiconductors, and amorphous silicon (Chittick et al., 1969; Okaniwa et al., 1983) in the following decades meant huge strides toward flexibility and processability, and thus these materials became the base for electronic devices in applications that require bending, rolling, folding, and stretching, among other properties that cannot be fulfilled by conventional electronics (Cheng and Wagner, 2009) (Figure 1). Presently there is great interest in new materials and fabrication techniques which allow for highperformance scalable electronic devices to be manufactured directly onto flexible substrates. This interest has also extended to not only flexibility but also properties like stretchability and healability which can be achieved by utilizing elastomeric substrates with strong molecular interactions (Oh et al., 2016; Kang et al., 2018). Likewise, biocompatibility and biodegradability has been achieved through polymers that do not cause adverse effect to the body and can be broken down into smaller constituent pieces after utilization (Bettinger and Bao, 2010; Irimia-Vladu et al., 2010; Liu H. et al., 2019). This new progress is now enabling devices which can conform to complex and dynamic surfaces, such as those found in biological systems and bioinspired soft robotics. These next-generation flexible electronics open up a wide range of exciting new applications such as flexible lighting and display technologies for consumer electronics, architecture, and textiles, wearables with sensors that help monitor our health and habits, implantable electronics for improved medical imaging and diagnostics, as well as extending the functionality of robots and unmanned aircraft through lightweight and conformable energy harvesting devices and sensors. While conventional electronics are very capable of these functions, flexible electronics are intended to expand the mechanical features to adhere to novel form factors through hybrid strategies, or as standalone solutions where the application does not require high computation power, intended to be highly robust to deformation, low cost, thin, or disposable. The definition of flexibility differs from application to application. From bending and rolling for easier handling of large area photovoltaics, to conforming onto irregular shapes, folding, twisting, stretching, and deforming required for devices in electronic skin, all while maintaining device performance and reliability. While early progress and many important innovations have already been achieved, the field of flexible electronics has many challenges before it becomes part of our daily life. This represents a huge opportunity for scientific research and development to rapidly and considerably advance this area (Figure 2). In this article the status, key challenges and opportunities for the field of nextgeneration flexible devices are elaborated in terms of materials, fabrication and specific applications. Edited and Reviewed by: Jhonathan Prieto Rojas, King Fahd University of Petroleum and Minerals, Saudi Arabia

Performance and Reliability Review of 650 V and 900 V Silicon and SiC Devices: MOSFETs, Cascode JFETs and IGBTs

Abstract: The future of power conversion at low-to-medium voltages (around 650 V) poses a very interesting debate. At low voltages (below 100 V), the silicon (Si) MOSFET reigns supreme and at the higher end of the automotive medium-voltage application spectrum (approximately 1 kV and above) the SiC power MOSFET looks set to topple the dominance of the Si insulated-gate bipolar transistor (IGBT). At very high voltages (4.5 kV, 6.5 kV and above) used for grid applications, the press-pack thyristor remains undisputed for current source converters and the press-pack IGBTs for voltage source converters. However, around 650 V, there does not seem to be a clear choice with all the major device manufacturers releasing different technology variants ranging from SiC Trench MOSFETs, SiC Planar MOSFETs, cascode-driven WBG FETs, silicon NPT and Field-stop IGBTs, silicon super-junction MOSFETs, standard silicon MOSFETs, and enhancement mode GaN high electron mobility transistors (HEMTs). Each technology comes with its unique selling point with gallium nitride (GaN) being well known for ultrahigh speed and compact integration, SiC is well known for high temperature, electro-thermal ruggedness, and fast switching while silicon remains clearly dominant in cost and proven reliability. This article comparatively assesses the performance of some of these technologies, investigates their body diodes, discusses device reliability, and avalanche ruggedness.

Low-voltage 2D materials-based printed field-effect transistors for integrated digital and analog electronics on paper

Abstract: Paper is the ideal substrate for the development of flexible and environmentally sustainable ubiquitous electronic systems, which, combined with two-dimensional materials, could be exploited in many Internet-of-Things applications, ranging from wearable electronics to smart packaging. Here we report high-performance MoS2 field-effect transistors on paper fabricated with a “channel array” approach, combining the advantages of two large-area techniques: chemical vapor deposition and inkjet-printing. The first allows the pre-deposition of a pattern of MoS2; the second, the printing of dielectric layers, contacts, and connections to complete transistors and circuits fabrication. Average ION/IOFF of 8 × 103 (up to 5 × 104) and mobility of 5.5 cm2 V−1 s−1 (up to 26 cm2 V−1 s−1) are obtained. Fully functional integrated circuits of digital and analog building blocks, such as logic gates and current mirrors, are demonstrated, highlighting the potential of this approach for ubiquitous electronics on paper. Paper is a promising substrate for flexible and environmentally sustainable electronic devices. Here, the authors combine chemical vapor deposition of MoS2 with inkjet printing of a hexagonal boron nitride (hBN) dielectric and silver electrodes, to fabricate flexible MoS2 field-effect transistors on paper, and then combine the latter with printed graphene resistors and silver interconnects to create inverters, logic gates and current mirrors.

Flexible low-voltage high-frequency organic thin-film transistors.

Abstract: The primary driver for the development of organic thin-film transistors (TFTs) over the past few decades has been the prospect of electronics applications on unconventional substrates requiring low-temperature processing. A key requirement for many such applications is high-frequency switching or amplification at the low operating voltages provided by lithium-ion batteries (~3 V). To date, however, most organic-TFT technologies show limited dynamic performance unless high operating voltages are applied to mitigate high contact resistances and large parasitic capacitances. Here, we present flexible low-voltage organic TFTs with record static and dynamic performance, including contact resistance as small as 10 Ω·cm, on/off current ratios as large as 1010, subthreshold swing as small as 59 mV/decade, signal delays below 80 ns in inverters and ring oscillators, and transit frequencies as high as 21 MHz, all while using an inverted coplanar TFT structure that can be readily adapted to industry-standard lithographic techniques.

Surge-Energy and Overvoltage Ruggedness of P-Gate GaN HEMTs

Abstract: An essential ruggedness of power devices is the capability of safely withstanding the surge energy. The surge ruggedness of the GaN high-electron-mobility transistor (HEMT), a power transistor with no or minimal avalanche capability, has not been fully understood. This article unveils the comprehensive physics associated with the surge-energy withstand process and the failure mechanisms of p-gate GaN HEMTs. Two commercial p-gate GaN HEMTs with Ohmic- and Schottky-type gate contacts are studied. Two circuits are developed to study the device surge ruggedness: an unclamped inductive switching circuit is first used to identify the withstand dynamics and failure mechanisms, and a clamped inductive switching circuit with a controllable parasitic inductance is then designed to mimic the surge energy in converter-like switching events. The p-gate GaN HEMT is found to withstand the surge energy through a resonant energy transfer between the device capacitance and the load/parasitic inductance rather than a resistive energy dissipation as occurred in the avalanche. If the device resonant voltage goes below zero, the device reversely turns on and the inductor is discharged. The device failure occurs at the transient of peak resonant voltage and is limited by the device overvoltage capability rather than the surge energy, dV/dt , or overvoltage duration. Almost no energy is dissipated in the resonant withstand process and the device failure is dominated by an electric field rather than a thermal runaway. These results provide critical understandings on the ruggedness of GaN HEMTs and important references for their qualifications and applications.

Lateral β-Ga2O3 field effect transistors

Abstract: Beta phase Gallium Oxide (BGO) is an emerging ultra-wide bandgap semiconductor with disruptive potential for ultra-low power loss, high-efficiency power applications. The critical field strength is the key enabling material parameter of BGO which allows sub-micrometer lateral transistor geometry. This property combined with ion-implantation technology and large area native substrates result in exceptionally low conduction losses, faster power switching frequency and even radio frequency power. We present a review of BGO epitaxial materials and lateral field-effect transistors developments, highlight early achievements and discuss engineering solutions with power switching and radio frequency applications in mind.

Room-temperature valleytronic transistor.

Abstract: Valleytronics, based on the valley degree of freedom rather than charge, is a promising candidate for next-generation information devices beyond complementary metal–oxide–semiconductor (CMOS) technology1–4. Although many intriguing valleytronic properties have been explored based on excitonic injection or the non-local response of transverse current schemes at low temperature4–7, demonstrations of valleytronic building blocks similar to transistors in electronics, especially at room temperature, remain elusive. Here, we report a solid-state device that enables a full sequence of generating, propagating, detecting and manipulating valley information at room temperature. Chiral nanocrescent plasmonic antennae8 are used to selectively generate valley-polarized carriers in MoS2 through hot-electron injection under linearly polarized infrared excitation. These long-lived valley-polarized free carriers can be detected in a valley Hall configuration9–11 even without charge current, and can propagate over 18 μm by means of drift. In addition, electrostatic gating allows us to modulate the magnitude of the valley Hall voltage. The electrical valley Hall output could drive the valley manipulation of a cascaded stage, rendering the device able to serve as a transistor free of charge current with pure valleytronic input/output. Our results demonstrate the possibility of encoding and processing information by valley degree of freedom, and provide a universal strategy to study the Berry curvature dipole in quantum materials. A MoS2 transistor with chiral nanocrescent plasmonic antennae enables the generation, propagation, detection and manipulation of valley information at room temperature.

Nonvolatile ferroelectric field-effect transistors.

Abstract: Future data-intensive applications will have integrated circuit architectures combining energy-efficient transistors, high-density data storage and electro-optic sensing arrays in a single chip to perform in situ processing of captured data. The costly dense wire connections in 3D integrated circuits and in conventional packaging and chip-stacking solutions could affect data communication bandwidths, data storage densities, and optical transmission efficiency. Here we investigated all-ferroelectric nonvolatile LiNbO3 transistors to function through redirection of conducting domain walls between the drain, gate and source electrodes. The transistor operates as a single-pole, double-throw digital switch with complementary on/off source and gate currents controlled using either the gate or source voltages. The conceived device exhibits high wall current density and abrupt off-and-on state switching without subthreshold swing, enabling nonvolatile memory-and-sensor-in-logic and logic-in-memory-and-sensor capabilities with superior energy efficiency, ultrafast operation/communication speeds, and high logic/storage densities. There is growing interest in non-traditional materials for logic applications. Here, the authors demonstrate a domain device architecture based on ferroelectric LiNbO3 crystals with gate voltage controlled transistor without subthreshold swing and source voltage controlled nonvolatile transistor.

High-Performance Nonvolatile Organic Photonic Transistor Memory Devices using Conjugated Rod-Coil Materials as a Floating Gate.

Abstract: A novel approach for using conjugated rod-coil materials as a floating gate in the fabrication of nonvolatile photonic transistor memory devices, consisting of n-type Sol-PDI and p-type C10-DNTT, is presented. Sol-PDI and C10-DNTT are used as dual functions of charge-trapping (conjugated rod) and tunneling (insulating coil), while n-type BPE-PDI and p-type DNTT are employed as the corresponding transporting layers. By using the same conjugated rod in the memory layer and transporting channel with a self-assembled structure, both n-type and p-type memory devices exhibit a fast response, a high current contrast between "Photo-On" and "Electrical-Off" bistable states over 105 , and an extremely low programing driving force of 0.1 V. The fabricated photon-driven memory devices exhibit a quick response to different wavelengths of light and a broadband light response that highlight their promising potential for light-recorder and synaptic device applications.

Light‐Driven WSe2‐ZnO Junction Field‐Effect Transistors for High‐Performance Photodetection

Abstract: Assembling nanomaterials into hybrid structures provides a promising and flexible route to reach ultrahigh responsivity by introducing a trap-assisted gain (G) mechanism. However, the high-gain photodetectors benefitting from long carrier lifetime often possess slow response time (t) due to the inherent G-t tradeoff. Here, a light-driven junction field-effect transistor (LJFET), consisting of an n-type ZnO belt as the channel material and a p-type WSe2 nanosheet as a photoactive gate material, to break the G-t tradeoff through decoupling the gain from carrier lifetime is reported. The photoactive gate material WSe2 under illumination enables a conductive path for externally applied voltage, which modulates the depletion region within the ZnO channel efficiently. The gain and response time are separately determined by the field effect modulation and the switching speed of LJFET. As a result, a high responsivity of 4.83 × 103 A W-1 with a gain of ≈104 and a rapid response time of ≈10 µs are obtained simultaneously. The LJFET architecture offers a new approach to realize high-gain and fast-response photodetectors without the G-t tradeoff.

(Ultra)Wide-Bandgap Vertical Power FinFETs

Abstract: FinFET is the backbone device technology for CMOS electronics at deeply scaled technology nodes per Moore’s law. Recently, the FinFET concept has been leveraged to develop a new generation of vertical power transistors based on wide-bandgap (WBG) and ultrawide-bandgap (UWBG) semiconductors for kilovolts and high-power applications. The sidewall gate-stack in a vertical power FinFET can rely on either a metal–oxide–semiconductor (MOS) structure or a p-n junction, rendering a Fin-MOSFET or a fin-based junction field-effect transistor (Fin-JFET), respectively. Although the device technologies are still at the early stage of development, 1.2-kV-class WBG gallium nitride (GaN) power Fin-MOSFETs have demonstrated one of the highest static and switching performances in all similarly rated power transistors; UWBG gallium oxide power Fin-MOSFETs have shown high performance up to a breakdown voltage over 2.6 kV. Early UWBG diamond lateral power Fin-MOSFETs have also been demonstrated. Meanwhile, GaN power Fin-JFETs are currently under active development. This article provides a comprehensive tutorial and review of the background and recent advances in WBG and UWBG vertical power FinFETs. It covers fundamental device physics, device and process development, as well as the static and switching performance of various power Fin-MOSFETs and Fin-JFETs. This article is concluded by identifying the current challenges and exciting research opportunities in this very dynamic research field.

Full-color active-matrix organic light-emitting diode display on human skin based on a large-area MoS2 backplane.

Abstract: Electronic applications are continuously developing and taking new forms. Foldable, rollable, and wearable displays are applicable for human health care monitoring or robotics, and their operation relies on organic light-emitting diodes (OLEDs). Yet, the development of semiconducting materials with high mechanical flexibility has remained a challenge and restricted their use in unusual format electronics. This study presents a wearable full-color OLED display using a two-dimensional (2D) material-based backplane transistor. The 18-by-18 thin-film transistor array was fabricated on a thin MoS2 film that was transferred to Al2O3 (30 nm)/polyethylene terephthalate (6 μm). Red, green, and blue OLED pixels were deposited on the device surface. This 2D material offered excellent mechanical and electrical properties and proved to be capable of driving circuits for the control of OLED pixels. The ultrathin device substrate allowed for integration of the display on an unusual substrate, namely, a human hand.

Analysis and Design of Highly Efficient Wideband RF-Input Sequential Load Modulated Balanced Power Amplifier

Abstract: The analysis and design of an RF-input sequential load modulated balanced power amplifier (SLMBA) are presented in this article. Unlike the existing LMBAs, in this new configuration, an over-driven class-B amplifier is used as the carrier amplifier while the balanced PA pair is biased in class-C mode to serve as the peaking amplifier. It is illustrated that the sequential operation greatly extends the high-efficiency power range and enables the proposed SLMBA to achieve high back-off efficiency across a wide bandwidth. An RF-input SLMBA at 3.05–3.55-GHz band using commercial GaN transistors is designed and implemented to validate the proposed architecture. The fabricated SLMBA attains a measured 9.5–10.3-dB gain and 42.3–43.7-dBm saturated power. Drain efficiency of 50.9–64.9/46.8–60.7/43.2–51.4% is achieved at 6-/8-/10-dB output power back-off within the designed bandwidth. By changing the bias condition of the carrier device, higher than 49.1% drain efficiency can be obtained within the 12.8-dB output power range at 3.3 GHz. When driven by a 40-MHz orthogonal frequency-division multiplexing (OFDM) signal with 8-dB peak-to-average power ratio (PAPR), the proposed SLMBA achieves adjacent channel leakage ratio (ACLR) better than −25 dBc with an average efficiency of 63.2% without digital predistortion (DPD). When excited by a ten-carrier 200-MHz OFDM signal with 10-dB PAPR, the average efficiency can reach 48.2% and −43.9-dBc ACLR can be obtained after DPD.

A hardwired machine learning processing engine fabricated with submicron metal-oxide thin-film transistors on a flexible substrate

Abstract: Flexible electronics can create lightweight, conformable components that could be integrated into smart systems for applications in healthcare, wearable devices and the Internet of Things Such integrated smart systems will require a flexible processing engine to address their computational needs However, the flexible processors demonstrated so far are typically fabricated using low-temperature poly-silicon thin-film transistor (TFT) technology, which has a high manufacturing cost, and the processors that have been created with low-cost metal-oxide TFT technology have limited computational capabilities Here, we report a processing engine that is fabricated with a commercial 08-μm metal-oxide TFT technology We develop a resource-efficient machine learning algorithm (the ‘univariate Bayes feature voting classifier’) and demonstrate its implementation with hardwired parameters as a flexible processing engine for an odour recognition application Our flexible processing engine contains around 1,000 logic gates and has a gate density per area that is 20–45 times higher than other digital integrated circuits built with metal-oxide TFTs Using commercial 08-μm metal-oxide thin-film transistor technology, a flexible processor chip can be built that has hardwired parameters for machine learning and is capable of smart applications such as odour recognition

W-Band Power Performance of SiN-Passivated N-Polar GaN Deep Recess HEMTs

Abstract: This letter reports on the improvement of the large-signal W-band power performance of nitrogen-polar gallium nitride deep recess high electron mobility transistors with the addition of a 40-nm-thick ex-situ silicon nitride passivation layer deposited by plasma enhanced chemical vapor deposition. The additional passivation improves the dispersion control allowing the device to be operated at higher voltages. Continuous-wave load pull measurements performed at 94 GHz on a $2\times 37.5\,\,\mu \text{m}$ transistor demonstrated an improvement in the peak power-added efficiency (PAE) to 30.2% with an associated output power density of 7.2 W/mm at 20 V drain bias. Furthermore, at 23 V, a new record-high W-band power density of 8.84 W/mm (663 mW) was achieved with an associated PAE of 27.0%.

Fast Gate-Based Readout of Silicon Quantum Dots Using Josephson Parametric Amplification.

Abstract: Spins in silicon quantum devices are promising candidates for large-scale quantum computing. Gate-based sensing of spin qubits offers a compact and scalable readout with high fidelity, however, further improvements in sensitivity are required to meet the fidelity thresholds and measurement timescales needed for the implementation of fast feedback in error correction protocols. Here, we combine radio-frequency gate-based sensing at 622 MHz with a Josephson parametric amplifier, that operates in the 500--800 MHz band, to reduce the integration time required to read the state of a silicon double quantum dot formed in a nanowire transistor. Based on our achieved signal-to-noise ratio, we estimate that singlet-triplet single-shot readout with an average fidelity of 99.7% could be performed in $1\text{ }\text{ }\ensuremath{\mu}\mathrm{s}$, well below the requirements for fault-tolerant readout and 30 times faster than without the Josephson parametric amplifier. Additionally, the Josephson parametric amplifier allows operation at a lower radio-frequency power while maintaining identical signal-to-noise ratio. We determine a noise temperature of 200 mK with a contribution from the Josephson parametric amplifier (25%), cryogenic amplifier (25%) and the resonator (50%), showing routes to further increase the readout speed.

Design of a High-Efficiency, High Specific-Power Three-Level T-Type Power Electronics Building Block for Aircraft Electric-Propulsion Drives

Abstract: The electric propulsion drives for the more-electric aircraft need lightweight and high-efficiency power converters. Moreover, a modular approach to the construction of the drive ensures reduced costs, reliability, and ease of maintenance. In this article, the design and fabrication procedure of a modular dc–ac three-level t-type single phase-leg power electronics building block (PEBB) rated for 100-kW, 1-kV dc-link is reported for the first time. A hybrid switch (HyS) consisting of a silicon insulated-gate bipolar junction transistor (IGBT) and silicon carbide metal–oxide–semiconductor field-effect transistor (MOSFET) was used as an active device to enable high switching frequencies at high power. The topology and semiconductor selection were based on a model-based design tool for achieving high conversion efficiency and lightweight. Due to the unavailability of commercial three-level t-type power modules, a printed circuit board (PCB) and off-the-shelf discrete semiconductor-based high-power switch was designed for the neutral-point clamping. Also, a nontrivial aluminum-based multilayer laminated bus bar was designed to facilitate the low-inductance interconnection of the selected active devices and the capacitor bank. The measured inductance indicated symmetry of both current commutation loops in the bus bar and value in the range of 28–29 nH. The specific power and volumetric power density of the block were estimated to be 27.7 kW/kg and 308.61 W/in3, respectively. The continuous operation of the block was demonstrated at 48 kVA. The efficiency of the block was measured to be 98.2%.

A transverse tunnelling field-effect transistor made from a van der Waals heterostructure

Abstract: Semiconductor devices that rely on quantum tunnelling could be of use in logic, memory and radiofrequency applications. Tunnel devices that exhibit negative differential resistance typically follow an operating principle in which the tunnelling current contributes directly to the drive current. Here, we report a tunnelling field-effect transistor made from a black phosphorus/Al2O3/black phosphorus van der Waals heterostructure in which the tunnelling current is in the transverse direction with respect to the drive current. Through an electrostatic effect, this tunnelling current can induce a drastic change in the output current, leading to a tunable negative differential resistance with a peak-to-valley ratio of more than 100 at room temperature. Our device also exhibits abrupt switching, with a body factor (the relative change in gate voltage with respect to that of the surface potential) that is one-tenth of the Boltzmann limit for conventional transistors across a wide temperature range. A black phosphorus/Al2O3/black phosphorus heterostructure can be used to create a tunnel field-effect transistor in which the tunnelling current is in the transverse direction with respect to the drive current, leading to abrupt switching and a negative differential resistance with a peak-to-valley ratio of more than 100 at room temperature.