Transistor

About: Transistor is a research topic. Over the lifetime, 138090 publications have been published within this topic receiving 1455233 citations.

The Design of CMOS Radio-Frequency Integrated Circuits: RF CIRCUITS THROUGH THE AGES

Abstract: This expanded and thoroughly revised edition of Thomas H. Lee's acclaimed guide to the design of gigahertz RF integrated circuits features a completely new chapter on the principles of wireless systems. The chapters on low-noise amplifiers, oscillators and phase noise have been significantly expanded as well. The chapter on architectures now contains several examples of complete chip designs that bring together all the various theoretical and practical elements involved in producing a prototype chip. First Edition Hb (1998): 0-521-63061-4 First Edition Pb (1998); 0-521-63922-0

Organic TFT array on a paper substrate

Abstract: We demonstrate a high-performance organic thin-film transistor array fabricated on a flexible paper substrate. As a water and chemical barrier layer, 6-/spl mu/m-thick parylene has been coated on the paper substrate by using the vacuum deposition. The parylene layer protects the paper substrate from becoming damp during the wet chemical process. Using poly (3-hexylthiophene) as an active layer, a high-performance organic transistor with field effect mobility up to 0.086 cm/sup 2//V/spl middot/s and an on/off ratio of 10/sup 4/ can be achieved. Organic transistors built on a cheap paper substrate open a channel for future applications in flexible and disposable electronics with extremely low-cost.

Three-dimensional integrated circuit structure and method of making same

Abstract: Vertically oriented semiconductor devices may be added to a separately fabricated substrate that includes electrical devices and/or interconnect The plurality of vertically oriented semiconductor devices are physically separated from each other, and are not disposed within the same semiconductor body, or semiconductor substrate The plurality of vertically oriented semiconductor devices may be added to the separately fabricated substrate as a thin layer including several doped semiconductor regions which, subsequent to attachment, are etched to produce individual doped stack structures Alternatively, the plurality of vertically oriented semiconductor devices may be fabricated prior to attachment to the separately fabricated substrate The doped stack structures may form the basis for diodes, capacitors, n-MOSFETs, p-MOSFETs, bipolar transistors, and floating gate transistors Ferroelectric memory devices, Ferromagnetic memory devices, chalcogenide phase change devices, may be formed in a stackable add-on layer for use in conjunction with a separately fabricated substrate Stackable add-on layers may include interconnect lines

Insulated-gate transistor having narrow-bandgap-source

Abstract: A structure of a semiconductor device and a method of manufacturing the same is provided wherein a leakage current can be reduced while improving a drain breakdown voltage of an Insulated-Gate transistor such as a MOSFET, MOSSIT and a MISFET, and a holding characteristic of a memory cell such as a DRAM using these transistors as switching transistors can be improved, and further a reliability of a gate oxide film in a transfer gate can be improved. More particularly, a narrow band gap semiconductor region such as Six Ge1-x, Six Sn1-x, PbS is formed in an interior of a source region or a drain region in the SOI.IG-device. By selecting location and/or mole fraction of the narrow band gap semiconductor region in a SOI film, or selecting a kind of impurity element to compensate the crystal lattice mismatching due to the narrow-bandgap semiconductor region, the generation of crystal defects can be suppressed. Further the structure that the influences of the crystal defects to the transistor or memory characteristics such as the leakage current can be suppressed, even if the crystal defects are generated, are also proposed.

Vertical power mosfet having thick metal layer to reduce distributed resistance

Abstract: The on-resistance of a vertical power transistor is substantially reduced by forming a thick metal layer on top of the relatively thin metal layer that is conventionally used to make contact with the individual transistor cells in the device. The thick metal layer is preferably plated electrolessly on the thin metal layer through an opening that is formed in the passivation layer.