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Transistor

About: Transistor is a research topic. Over the lifetime, 138090 publications have been published within this topic receiving 1455233 citations.


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Journal ArticleDOI
TL;DR: In this article, a type of thin-film transistor that uses aligned arrays of thin (submicron) ribbons of single-crystal silicon created by lithographic patterning and anisotropic etching of bulk silicon wafers was introduced.
Abstract: This letter introduces a type of thin-film transistor that uses aligned arrays of thin (submicron) ribbons of single-crystal silicon created by lithographic patterning and anisotropic etching of bulk silicon (111) wafers. Devices that incorporate such ribbons printed onto thin plastic substrates show good electrical properties and mechanical flexibility. Effective device mobilities, as evaluated in the linear regime, were as high as 360cm2V−1s−1, and on/off ratios were >103. These results may represent important steps toward a low-cost approach to large-area, high-performance, mechanically flexible electronic systems for structural health monitors, sensors, displays, and other applications.

206 citations

Journal ArticleDOI
TL;DR: In this paper, a thin-film transistor with high carrier mobility has been fabricated using precursor-route poly(2,5thienylenevinylene) (PTV) as semiconductor.
Abstract: A thin‐film transistor (TFT) with high carrier mobility has been fabricated using precursor‐route poly(2,5‐thienylenevinylene) (PTV) as semiconductor. The carrier mobility has been determined to be 0.22 cm2/V s, which is in the same level of that of amorphous silicon TFT. It has also been made clear that the carrier mobility is linearly proportional to the conversion ratio from the insulated precursor polymer to π‐conjugated PTV. The π‐conjugation length is crucial to obtain high carrier mobility in π‐conjugated polymer TFT.

206 citations

Journal ArticleDOI
TL;DR: This paper studies the application of lateral bulk acoustic thin-film piezoelectric-on-substrate (TPoS) resonators in high-frequency reference oscillators, designed and fabricated in 2 classes--high-order and coupled-array and the performance characteristics of the oscillators are measured and discussed.
Abstract: This paper studies the application of lateral bulk acoustic thin-film piezoelectric-on-substrate (TPoS) resonators in high-frequency reference oscillators Low-motional impedance TPoS resonators are designed and fabricated in 2 classes--high-order and coupled-array Devices of each class are used to assemble reference oscillators and the performance characteristics of the oscillators are measured and discussed Since the motional impedance of these devices is small, the transimpedance amplifier (TIA) in the oscillator loop can be reduced to a single transistor and 3 resistors, a format that is very power-efficient The lowest reported power consumption is ~350 muW for an oscillator operating at ~106 MHz A passive temperature compensation method is also utilized bThis paper studies the application of lateral bulk acoustic thin-film piezoelectric-on-substrate (TPoS) resonators in high-frequency reference oscillators Low-motionalimpedance TPoS resonators are designed and fabricated in 2 classes--high-order and coupled-array Devices of each class are used to assemble reference oscillators and the performance characteristics of the oscillators are measured and discussed Since the motional impedance of these devices is small, the transimpedance amplifier (TIA) in the oscillator loop can be reduced to a single transistor and 3 resistors, a format that is very power-efficient The lowest reported power consumption is ~350 muW for an oscillator operating at ~106 MHz A passive temperature compensation method is also utilized by including the buried oxide layer of the silicon-on-insulator (SOI) substrate in the structural resonant body of the device, and a very small (-24 ppm/degC) temperature coefficient of frequency is obtained for an 82-MHz oscillatory including the buried oxide layer of the silicon-on-insulator (SOI) substrate in the structural resonant body of the device, and a very small (-24 ppm/degC) temperature coefficient of frequency is obtained for an 82-MHz oscillator

206 citations

Journal ArticleDOI
TL;DR: In this paper, an effective stacked memory concept utilizing all-oxide-based device components for future high-density nonvolatile stacked structure data storage is developed, where GaInZnO (GIZO) thin-film transistors, grown at room temperature, are integrated with one-diode (CuO/InXnO) and one-resistor (NiO) (1D-1R) structure oxide storage node elements.
Abstract: An effective stacked memory concept utilizing all-oxide-based device components for future high-density nonvolatile stacked structure data storage is developed. GaInZnO (GIZO) thin-film transistors, grown at room temperature, are integrated with one-diode (CuO/InZnO)–one-resistor (NiO) (1D–1R) structure oxide storage node elements, fabricated at room temperature. The low growth temperatures and fabrication methods introduced in this paper allow the demonstration of a stackable memory array as well as integrated device characteristics. Benefits provided by low-temperature processes are demonstrated by fabrication of working devices over glass substrates. Here, the device characteristics of each individual component as well as the characteristics of a combined select transistor with a 1D–1R cell are reported. X-ray photoelectron spectroscopy analysis of a NiO resistance layer deposited by sputter and atomic layer deposition confirms the importance of metallic Ni content in NiO for bi-stable resistance switching. The GIZO transistor shows a field-effect mobility of 30 cm2 V−1 s−1, a Vth of +1.2 V, and a drain current on/off ratio of up to 108, while the CuO/InZnO heterojunction oxide diode has forward current densities of 2 × 104 A cm−2. Both of these materials show the performance of state-of-the-art oxide devices.

206 citations

Journal ArticleDOI
H. Berger1, S.K. Wiedmann1
01 Oct 1972
TL;DR: In this article, the authors describe a novel bipolar logic featuring a direct injection of minority carriers into the switching transistor, which is based on inverters having decoupled multicollector outputs for the logical combinations.
Abstract: The authors describe a novel bipolar logic featuring a direct injection of minority carriers into the switching transistor. MTL is based on inverters having decoupled multicollector outputs for the logical combinations. The devices are self-isolated and no ohmic load resistors are required. This is a key to monolithic logic chips of very high functional density and low power dissipation. On experimental chips an excellent power-delay product of 0.35 pJ has been measured. These experiments show that a density of 100 gates/mm/SUP 2/ can be achieved with present manufacturing tolerances (minimum dimensions: 0.3-mil metal line width, 0.15-mil spacing, 0.2/spl times/0.2-mil/SUP 2/ contact holes).

205 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20231,850
20224,013
20211,802
20203,677
20194,203
20184,241