Transistor

About: Transistor is a research topic. Over the lifetime, 138090 publications have been published within this topic receiving 1455233 citations.

Room-temperature plasma waves resonant detection of sub-terahertz radiation by nanometer field-effect transistor

Abstract: We report on room-temperature, resonant detection of 0.6THz radiation by 250nm gate length GaAs∕AlGaAs heterostructure field-effect transistor. We show that the detection is strongly increased (and becomes resonant) when the drain current increases and the transistor is driven into the current saturation region. We interpret the results as due to resonant plasma wave detection that is enhanced by increasing the electron drift velocity.

Vertical insulated gate transistor and method of manufacture

Abstract: A vertical insulated gate transistor such as a UMOSFET is manufactured. A source region of first conductivity type is formed on the bottom surface of a substrate. A base region of second conductivity type is formed on the source region. A low-impurity-concentration drift region is formed on the base region. On the top surface of this multilayer structure, a truncated U groove is formed. A buried gate electrode is formed inside the truncated U groove. This structure is effective to reduce gate-drain capacitance Cgd, gate-source capacitance Cgs, and drain resistance r d , thereby realizing a high-frequency high-output device. A distance between the gate and the drain is determined in a self-aligning manner, so that a fine structure and a high-frequency operation are easily realized and production yield is improved.

Managing standby and active mode leakage power in deep sub-micron design

Abstract: Scaling has allowed rising transistor counts per die and increases leakage at an exponential rate, making power a primary constraint in all integrated circuit designs. Future designs must address emerging leakage components due to direct band to band tunneling, through MOSFET oxides and at steep junction doping gradients. In this paper, we describe circuit design techniques for managing leakage power, both during standby and for limiting the leakage power contribution during active operation. The efficacy, design effort, and process ramifications of different approaches are examined. The schemes are primarily aimed at hand-held devices such as cell phones, since the needs for low power are most acute in these markets due to limited battery capacity.

Flexible organic complementary circuits

Abstract: We report the first organic complementary circuits on flexible substrates. Organic thin-film transistors were fabricated using pentacene as the semiconductor for the p-channel devices and hexadecafluorocopperphthalocyanine (F/sub 16/CuPc) as the semiconductor for the n-channel devices. Both semiconductors were purchased from commercial sources and deposited by evaporation in vacuum. The pentacene layer was photolithographically patterned to simplify the circuit layout and reduce the circuit area. The transistors and circuits were manufactured on thin, transparent sheets of polyethylene naphthalate. Evaporated metals were used to define all contacts and interconnects, and a 50-nm-thick layer of solution-processed polyvinylphenol was used as the gate dielectric. Transistors and circuits operate at supply voltages as low as 8 V, and ring oscillators have a signal propagation delay as low as 8 /spl mu/s per stage. To our knowledge, these are the fastest organic complementary circuits reported to date.

Silicon integrated circuits

Abstract: A dynamic random access memory in which individual cells, including an access transistor and a storage capacitor, are formed in mesas formed on a silicon chip. The access transistor of the cell is formed on the top surface of the mesa and one plate of the storage capacitor of the cell is formed by the sidewall of the mesa and the other plate by doped polycrystalline silicon which fills the grooves surrounding the mesas isolated therefrom by a silicon dioxide layer. By this geometry, large storage surfaces, and so large capacitances, can be obtained for the capacitor without using surface area of the chip. In other embodiments, the mesas may include other forms of circuit elements.