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Transistor

About: Transistor is a research topic. Over the lifetime, 138090 publications have been published within this topic receiving 1455233 citations.


Papers
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Journal ArticleDOI
TL;DR: In this article, a pentacene thin-film transistor with an ultrathin layer of polyvinyl alcohol (9nm) as a gate insulator was constructed and tested at low operating voltages (below 2V).
Abstract: A key issue in research into organic thin-film transistors (OTFTs) is low-voltage operation. In this study, we fabricated a pentacene thin-film transistor with an ultrathin layer of polyvinyl alcohol (9nm) as a gate insulator, and obtained a device with excellent electrical characteristics at low operating voltages (below 2V). This device was found to have a field-effect mobility of 1.1cm2∕Vs, a threshold voltage of −0.98V, an exceptionally low subthreshold slope of 180mV/decade, and an on/off current ratio of 106. This favorable combination of properties means that such OTFTs can be operated successfully at voltages below 2V.

166 citations

Patent
15 Oct 1991
TL;DR: In this article, a light valve has a composite substrate comprised of an electrically insulating substrate and a semiconductor single crystal thin film formed over the electrically-insulating substrate.
Abstract: A light valve has a composite substrate comprised of an electrically insulating substrate and a semiconductor single crystal thin film formed over the electrically insulating substrate. A pixel array comprising semiconductor switch elements is formed in the semiconductor single crystal thin film. A peripheral circuit having circuit elements is formed in the semiconductor single crystal thin film so that a small-sized, high speed light valve is obtained. X- driver and Y-driver circuits are formed in the semiconductor single crystal thin film and controlled by a control circuit, such as a video signal processing circuit, which receives and processes video signals inputted directly from an external source. The peripheral circuit can be a DRAM sense amplifier for sensing charges stored in each pixel of the pixel array to detect defects in the pixel array. The peripheral circuit can be a photosensor circuit for detecting an intensity of incident light to monitor the performance of a light source of the light valve. The peripheral circuit can be a temperature sensor for detecting the temperature of a liquid crystal layer of the light valve, and may be comprised of Darlington connected NPN transistors formed in the semiconductor single crystal thin film. The peripheral circuit can also be a solar cell for converting incident light into electrical energy to supply power to at least one of the pixel array, X-driver and Y-driver circuits and the peripheral circuit.

166 citations

Journal ArticleDOI
TL;DR: This work has focused on defining just the storage node portion of the devices, which utilize the resis-tance change within the film to store information via two dif-ferent stable resistance states, and has attempted to de-termine the properties of such structures.
Abstract: while still retaining a selective switch (transistor or diode) asthe data storage element. Thus for high-density applications,crossbar structures are ideal, whereas for non-volatility, resis-tance-change materials showthe best promise. In orderto rea-lize the fabrication of universal memory elements, it is im-perative to develop a class of materials and structures thatcombine robust processibility, strong scalability, and rapidprogramming speed with non-volatility and low power con-sumption. In our work, we have focused on defining just thestorage node portion of the devices, which utilize the resis-tance change within the film to store information via two dif-ferent stable resistance states. Here, we have attempted to de-termine the properties of such structures and to study themechanisms behind resistance RAM (RRAM) storage. OurTi-doped (0.1 wt %) NiO samples deposited at room temper-ature show favorable node characteristics such as the lowestwrite current reported thus far for a unipolar switching resis-tance-change-based device (ca. 10 lA). In addition, the pro-gramming speed is comparable to the write time of SRAM(10 ns). By combining this node element with an appropriateselect switch, such as a high-performance diode, a thresholddevice, or a two-terminal non-ohmic device, it becomes possi-ble to fabricate high-density universal memory.Indeed, the fabrication of universal memory as the nextgeneration of non-volatile memory is the logical goal for re-search in this field. In comparison to Flash and dynamicRAM (DRAM), which are the current industry standards,next generation memories must combine the non-volatility ofFlash with the high-speed performance of SRAM.

166 citations

Patent
Hisatoshi Mori1, Syunichi Sato1, Naohiro Konya1, Ichiro Ohno1, Hiromitsu Ishii1, Kunihiro Matsuda1 
12 Jan 1993
TL;DR: A thin-film transistor as discussed by the authors comprises a gate electrode formed on a glass substrate, a gate insulating film formed essentially over an entire surface of the substrate to cover the gate electrode, and a drain electrode and a source electrode spaced a specified distance apart on the semiconductor film.
Abstract: A thin-film transistor comprises a gate electrode formed on a glass substrate, a gate insulating film formed essentially over an entire surface of the substrate to cover the gate electrode, a non-single-crystal silicon semiconductor film placed on the gate insulating film to cover the gate electrode; and a drain electrode and a source electrode spaced a specified distance apart on the semiconductor film and electrically connected to the semiconductor film so as to form the channel region of the transistor. The gate electrode is made of titanium-containing aluminum.

166 citations

Patent
26 Feb 2001
TL;DR: In this article, a semiconductor memory device comprising a write transistor with a gate connected to a write word line and with a first impurity region forming a source or drain connected to the bit line, a read transistor with gate connecting to a second impurity area forming a drain of the write transistor and a capacitor connected between the gate and the read transistor is described.
Abstract: A semiconductor memory device comprising a write transistor with a gate connected to a write word line and with a first impurity region forming a source or drain connected to a bit line, a read transistor with a gate connected to a second impurity region forming a source or drain of the write transistor, a first impurity region connected to a read word line, and a second impurity region connected to a bit line, and a capacitor connected between the gate and the second impurity region of the read transistor.

166 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20231,850
20224,013
20211,802
20203,677
20194,203
20184,241