Transistor

About: Transistor is a research topic. Over the lifetime, 138090 publications have been published within this topic receiving 1455233 citations.

Field effect transistor having an interlayer dielectric material having increased intrinsic stress

Abstract: By providing a highly stressed interlayer dielectric material, the performance of at least one type of transistor may be increased due to an enhanced strain-inducing mechanism. For instance, by providing a highly compressive silicon dioxide of approximately 400 Mega Pascal and more as an interlayer dielectric material, the drive current of the P-channel transistors may be increased by 2% and more while not unduly affecting the performance of the N-channel transistors.

Microwave properties of Schottky-barrier field-effect transistors

Abstract: The microwave properties of silicon Schottky-barrier field-effect transistor(MESFET'S) with a gate-length of one micrometer are investigated. The scattering parameters of the transistors have been measured from 0.1 GHz up to 12 GHz. From the measured data an equivalent circuit is established which consist of an intrinsic transistor and extrinsic elements. Some of the elements of the intrinsic transistor, notably the transconductance, are strongly influenced by the saturation of the drift velocity. Best performance of the intrinsic transistor is obtained with highly doped and thin channels. The measured power-gain is in good agreement with theoretical values deduced from the equivalent circuit. The best device has a maximum frequency of oscillation fmax of 12 GHz. The investigation reveals that the extrinsic elements, especially the resistance of the gate-metallization and the gate-pad parasitics, degrade the power-gain considerably. Without them a value of fmax close to 20 GHz is predicted.

Programmable structured arrays

Abstract: A programmable semiconductor device includes a user programmable switch comprising a configurable element positioned above a transistor material layer deposited on a substrate layer.

Lateral Graphene–hBCN Heterostructures as a Platform for Fully Two-Dimensional Transistors

Abstract: We propose that lateral heterostructures of single-atomic-layer graphene and hexagonal boron-carbon-nitrogen (hBCN) domains, can represent a powerful platform for the fabrication and the technological exploration of real two-dimensional field-effect transistors. Indeed, hBCN domains have an energy bandgap between 1 and 5 eV, and are lattice-matched with graphene; therefore they can be used in the channel of a FET to effectively inhibit charge transport when the transistor needs to be switched off. We show through ab initio and atomistic simulations that a FET with a graphene-hBCN-graphene heterostructure in the channel can exceed the requirements of the International Technology Roadmap for Semiconductors for logic transistors at the 10 and 7 nm technology nodes. Considering the main figures of merit for digital electronics, a FET with gate length of 7 nm at a supply voltage of 0.6 V exhibits I(on)/I(off) ratio larger than 10(4), intrinsic delay time of about 0.1 ps, and a power-delay-product close to 0.1 nJ/m. More complex graphene-hBCN heterostructures can allow the realization of different multifunctional devices, translating on a truly two-dimensional structure some of the device principles proposed during the first wave of nanoelectronics based on III-V heterostructures, as for example the resonant tunneling FET.

β-Ga2O3 on insulator field-effect transistors with drain currents exceeding 1.5 A/mm and their self-heating effect

Abstract: We have demonstrated that depletion/enhancement-mode β-Ga2O3 on insulator field-effect transistors can achieve a record high drain current density of 1.5/1.0 A/mm by utilizing a highly doped β-Ga2O3 nano-membrane as the channel. β-Ga2O3 on insulator field-effect transistor (GOOI FET) shows a high on/off ratio of 1010 and low subthreshold slope of 150 mV/dec even with 300 nm thick SiO2. The enhancement-mode GOOI FET is achieved through surface depletion. An ultra-fast, high resolution thermo-reflectance imaging technique is applied to study the self-heating effect by directly measuring the local surface temperature. High drain current, low Rc, and wide bandgap make the β-Ga2O3 on insulator field-effect transistor a promising candidate for future power electronics applications.