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Transistor

About: Transistor is a research topic. Over the lifetime, 138090 publications have been published within this topic receiving 1455233 citations.


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Journal ArticleDOI
TL;DR: In this article, the GaN-based recessed MIS-gate structure in conjunction with negative polarization charges under the gate allows the high threshold voltage, whereas the low on-state resistance is maintained by the 2D electron gas remaining in the channel except for the recessed gate region.
Abstract: This letter reports normally-off operation of an AlGaN/GaN recessed MIS-gate heterostructure field-effect transistor with a high threshold voltage. The GaN-based recessed MIS-gate structure in conjunction with negative polarization charges under the gate allows us to achieve the high threshold voltage, whereas the low on-state resistance is maintained by the 2-D electron gas remaining in the channel except for the recessed MIS-gate region. The fabricated device exhibits a threshold voltage as high as 5.2 V with a maximum field-effect mobility of 120 cm2/Vmiddots, a maximum drain current of over 200 mA/mm, and a breakdown voltage of 400 V.

383 citations

Journal ArticleDOI
31 Jan 1997-Science
TL;DR: A single-electron memory, in which a bit of information is stored by one electron, is demonstrated at room temperature and should be compatible with future ultralarge-scale integrated circuits.
Abstract: A single-electron memory, in which a bit of information is stored by one electron, is demonstrated at room temperature. The memory is a floating gate metal-oxide-semiconductor transistor in silicon with a channel width (∼10 nanometers) smaller than the Debye screening length of a single electron and a nanoscale polysilicon dot (∼7 nanometers by 7 nanometers) as the floating gate embedded between the channel and the control gate. Storing one electron on the floating gate screens the entire channel from the potential on the control gate and leads to (i) a discrete shift in the threshold voltage, (ii) a staircase relation between the charging voltage and the shift, and (iii) a self-limiting charging process. The structure and fabrication of the memory should be compatible with future ultralarge-scale integrated circuits.

383 citations

Journal ArticleDOI
TL;DR: In this article, a two-dimensional steep-slope MOSFET with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack is presented.
Abstract: The so-called Boltzmann tyranny defines the fundamental thermionic limit of the subthreshold slope of a metal-oxide-semiconductor field-effect transistor (MOSFET) at 60 mV dec-1 at room temperature and therefore precludes lowering of the supply voltage and overall power consumption 1,2 . Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this fundamental barrier 3 . Meanwhile, two-dimensional semiconductors such as atomically thin transition-metal dichalcogenides, due to their low dielectric constant and ease of integration into a junctionless transistor topology, offer enhanced electrostatic control of the channel 4-12 . Here, we combine these two advantages and demonstrate a molybdenum disulfide (MoS2) two-dimensional steep-slope transistor with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack. This device exhibits excellent performance in both on and off states, with a maximum drain current of 510 μA μm-1 and a sub-thermionic subthreshold slope, and is essentially hysteresis-free. Negative differential resistance was observed at room temperature in the MoS2 negative-capacitance FETs as the result of negative capacitance due to the negative drain-induced barrier lowering. A high on-current-induced self-heating effect was also observed and studied.

382 citations

Journal ArticleDOI
TL;DR: In this paper, a dual material gate (DMG) was applied to a tunnel field effect transistor (TFET) to simultaneously optimize the on-current, the off-current and the threshold voltage.
Abstract: In this paper, we propose the application of a dual material gate (DMG) in a tunnel field-effect transistor (TFET) to simultaneously optimize the on-current, the off-current, and the threshold voltage and also improve the average subthreshold slope, the nature of the output characteristics, and immunity against the drain-induced barrier lowering effects. We demonstrate that, if appropriate work functions are chosen for the gate materials on the source side and the drain side, the TFET shows a significantly improved performance. We apply the technique of DMG in a strained double-gate TFET with a high-k gate dielectric to show an overall improvement in the characteristics of the device, along with achieving a good on-current and an excellent average subthreshold slope. The results show that the DMG technique can be applied to TFETs with different channel materials, channel lengths, gate-oxide materials, gate-oxide thicknesses, and power supply levels to achieve significant gains in the overall device characteristics.

382 citations

Journal ArticleDOI
J.G. Linvill1
01 Jun 1953
TL;DR: The physical characteristics of transistors, compactness, long life, simple power requirements, plus constancy of pertinent electrical parameters enhance their practical utility in the production of negative impedances.
Abstract: Negative impedances having very stable characteristics are obtained with circuits using transistors. The physical characteristics of transistors, compactness, long life, simple power requirements, plus constancy of pertinent electrical parameters enhance their practical utility in the production of negative impedances.

380 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20231,850
20224,013
20211,802
20203,677
20194,203
20184,241