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Transistor

About: Transistor is a research topic. Over the lifetime, 138090 publications have been published within this topic receiving 1455233 citations.


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Journal ArticleDOI
TL;DR: In this paper, the authors present an overview of solid-state integrated circuit amplifiers approaching terahertz frequencies based on the latest device technologies which have emerged in the past several years.
Abstract: We present an overview of solid-state integrated circuit amplifiers approaching terahertz frequencies based on the latest device technologies which have emerged in the past several years. Highlights include the best reported data from heterojunction bipolar transistor (HBT) circuits, high electron mobility transistor (HEMT) circuits, and metamorphic HEMT (mHEMT) amplifier circuits. We discuss packaging techniques for the various technologies in waveguide modules and describe the best reported noise figures measured in these technologies. A consequence of THz transistors, namely ultra-low-noise at cryogenic temperatures, will be explored and results presented. We also present a short review of power amplifier technologies for the THz regime. Finally, we discuss emerging materials for THz amplifiers into the next decade.

264 citations

Proceedings ArticleDOI
13 Dec 2004
TL;DR: A 65nm generation logic technology with 1.2nm physical gate oxide, 35nm gate length, enhanced channel strain, NiSi, 8 layers of Cu interconnect, and low-k ILD for dense high performance logic is presented in this article.
Abstract: A 65nm generation logic technology with 1.2nm physical gate oxide, 35nm gate length, enhanced channel strain, NiSi, 8 layers of Cu interconnect, and low-k ILD for dense high performance logic is presented. Transistor gate length is scaled down to 35nm while not scaling the gate oxide as a means to improve performance and reduce power. Increased NMOS and PMOS drive currents are achieved by enhanced channel strain and junction engineering. 193nm lithography along with APSM mask technology is used on critical layers to provide aggressive design rules and a 6-T SRAM cell size of 0.57/spl mu/m/sup 2/. Process yield, performance and reliability are demonstrated on a 70 Mbit SRAM test vehicle with >0.5 billion transistors.

264 citations

Journal ArticleDOI
TL;DR: Stable non-volatile programmable p-n junctions fabricated from the vertically stacked all-2D semiconductor/insulator/metal layers (WSe2/hexagonal boron nitride/graphene) in a semifloating gate field-effect transistor configuration are reported.
Abstract: Semiconductor p–n junctions are the elementary building blocks of most electronic and optoelectronic devices. The need for their miniaturization has fuelled the rapid growth of interest in two-dimensional (2D) materials. However, the performance of a p–n junction considerably degrades as its thickness approaches a few nanometres and traditional technologies, such as doping and implantation, become invalid at the nanoscale. Here we report stable non-volatile programmable p–n junctions fabricated from the vertically stacked all-2D semiconductor/insulator/metal layers (WSe2/hexagonal boron nitride/graphene) in a semifloating gate field-effect transistor configuration. The junction exhibits a good rectifying behaviour with a rectification ratio of 104 and photovoltaic properties with a power conversion efficiency up to 4.1% under a 6.8 nW light. Based on the non-volatile programmable properties controlled by gate voltages, the 2D p–n junctions have been exploited for various electronic and optoelectronic applications, such as memories, photovoltaics, logic rectifiers and logic optoelectronic circuits. Stable, nonvolatile, programmable 2D p–n junctions enable realization of high-performance memories, photovoltaics, logic rectifiers and logic optoelectronic circuits.

264 citations

Journal ArticleDOI
TL;DR: In this article, the authors showed that the sub-threshold slope of transistors made in thin silicon films can be obtained (62 mV/ decade) when the silicon film thickness is smaller than the maximum depletion depth in the transistor channel.
Abstract: Silicon-on-insulator (SOI) n-channel transistors have been made in thin (90 nm) silicon films Both modeling and experimental results show that excellent subthreshold slopes can be obtained (62 mV/ decade) when the silicon film thickness is smaller than the maximum depletion depth in the transistor channel For comparison, the subthreshold slope of transistors made in thicker films is also reported

263 citations

Journal ArticleDOI
TL;DR: The fabrication of transparent thin-film transistors that behave like an elastomer film that are used to drive organic light-emitting diodes and represent an important progress toward the development of stretchable active-matrix displays.
Abstract: Thin-film field-effect transistor is a fundamental component behind various mordern electronics. The development of stretchable electronics poses fundamental challenges in developing new electronic materials for stretchable thin-film transistors that are mechanically compliant and solution processable. Here we report the fabrication of transparent thin-film transistors that behave like an elastomer film. The entire fabrication is carried out by solution-based techniques, and the resulting devices exhibit a mobility of ∼30 cm(2) V(-1) s(-1), on/off ratio of 10(3)-10(4), switching current >100 μA, transconductance >50 μS and relative low operating voltages. The devices can be stretched by up to 50% strain and subjected to 500 cycles of repeated stretching to 20% strain without significant loss in electrical property. The thin-film transistors are also used to drive organic light-emitting diodes. The approach and results represent an important progress toward the development of stretchable active-matrix displays.

263 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20231,850
20224,013
20211,802
20203,677
20194,203
20184,241