Showing papers on "Transmission delay published in 1989"

Bit-to-bit error dependence in slotted DS/SSMA packet systems with random signature sequences

Abstract: A technique is developed to find an accurate approximation to the probability of data bit error and the probability of packet success in a direct-sequence spread-spectrum multiple-access (DS/SSMA) packet radio system with random signature sequences. An improved Gaussian approximation to the probability of data bit error is performed. Packet performance is analyzed by using the theory of moment spaces to gain insight into the effect of bit-to-bit error dependence caused by interfering signal relative delays and phases which are assumed constant over the duration of a desired packet. Numerical results show that if no error control exists in the desired packet or if block error control is used when multiple-access interference is high, the error dependence increases the average probability of packet success beyond that predicted by models which use independent bit errors. However, when block error control is used and the multiple-access interference is low, the bit error dependencies cause a reduction in packet error performance. >

The revised ARPANET routing metric

Abstract: The ARPANET routing metric was revised in July 1987, resulting in substantial performance improvements, especially in terms of user delay and effective network capacity. These revisions only affect the individual link costs (or metrics) on which the PSN (packet switching node) bases its routing decisions. They do not affect the SPF (“shortest path first”) algorithm employed to compute routes (installed in May 1979). The previous link metric was packet delay averaged over a ten second interval, which performed effectively under light-to-moderate traffic conditions. However, in heavily loaded networks it led to routing instabilities and wasted link and processor bandwidth.The revised metric constitutes a move away from the strict delay metric: it acts similar to a delay-based metric under lightly loads and to a capacity-based metric under heavy loads. It will not always result in shortest-delay paths. Since the delay metric produced shortest-delay paths only under conditions of light loading, the revised metric involves giving up the guarantee of shortest-delay paths under light traffic conditions for the sake of vastly improved performance under heavy traffic conditions.

Variable bit-rate coding of video signals for ATM networks

Abstract: Statistical characteristics of video signals for video packet coding, are clarified and a variable-bit-rate coding method for asynchronous transfer mode (ATM) networks is described that is capable of compensating for packet loss ATM capabilities are shown to be greatly affected by delay, delay jitter, and packet loss probability Packet loss has the greatest influence on picture quality Packets may be lost either due to random bit error in a cell header or to network control when traffic is congested A layered coding technique using discrete-cosine transform (DCT) coding is presented which is suitable for packet loss compensation The influence of packet loss on picture quality is discussed, and decoded pictures with packet loss are shown The proposed algorithm was verified by computer simulations >

Packet congestion control method and packet switching equipment

Abstract: A packet switching equipment housing therein a plurality of pairs of an input line and an output line is provided with a monitor circuit for monitoring a packet congestion state in the packet switching equipment for each output line. When a packet congestion is detected in association with either one of the output lines, a congestion indicator is added to a packet to be delivered to the output line so as to return the packet as a congestion notice packet to an equipment as the transmission source of the packet; furthermore, the input packet is relayed via the output line to the destination equipment.

Adaptive data link protocol

Abstract: A communication system provides high speed transmission of data over a link, such as a fiber optic link, between a first terminal and a second terminal. The architecture and protocol permits the use of dedicated hardware such as state machines constructed of programmable array logic units, to synchronize the transmission and reception of data packets and the retransmission of designated ones of these packets in the event of a faulty transmission. Packets to be transmitted and received are stored in an array of frames in sub-windows of a memory storage window in each of the termianls, the frame number being equal to the sequence number of the data packet. By embedding sequence and status bits in each packet within control words and bits appended to each packet, the state machine in each terminal can readily track the progress of each packet so as to request acknowledgement of error-free receipt, to send an acknowledgement, to request a retransmission of a packet designated by its serial number and to distinguish a retransmitted packet from an original packet transmitted with error.

Packet voice/data communication system having protocol independent repetitive packet suppression

Abstract: A data communication system includes a repetitive pattern packet suppression technique which suppresses transmission of entire packets in a data stream when a repeating pattern has been established in the previous packet and then is found to repeat throughout the following packets. An expansion part of the technique fills the resulting hole in the data stream with the last pattern from the previously received packet.

Dependence in packet queues

Abstract: The burstiness of the total arrival process has been previously characterized in packet network performance models by the dependence among successive interarrival times. It is shown that associated dependence among successive service times and between service times and interarrival times also can be important for packet queues involving variable packet lengths. These dependence effects are demonstrated analytically by considering a multiclass single-server queue with batch-Poisson arrival processes. For this model and more realistic models of packet queues, insight is gained from heavy-traffic limit theorems. This study indicates that all three kinds of dependence should be considered in the analysis and measurement of packet queues involving variables packet lengths. Specific measurements are proposed for real systems and simulations. This study also indicates how to predict expected packet delays under heavy loads. Finally, this study is important for understanding the limitations of procedures such as the queuing network analyzer (QNA) for approximately describing the performance of queuing networks using the techniques of aggregation and decomposition. >

A growable packet (ATM) switch architecture: design principles and applications

Abstract: The authors consider the generic problem of designing a large N*N(N>1000) high-performance, broadband packet (or asynchronous transfer mode) switch. They provide ways to construct arbitrarily large switches out of modest-size packet switches, without sacrificing overall delay/throughput performance. They propose and study a growable switch architecture based on three key principles: (a) a generalized knockout principle which exploits the statistical behavior of packet arrivals and thereby reduces the interconnect complexity; (b) output queuing, which yields the best possible delay/throughput performance; and (c) distributed intelligence in routing packets through the interconnect fabric. Other features include the guarantee of a first-in first-out packet sequence, broadcast and multicast capabilities, and compatibility with variable-length packets. In a broadband ISDN (integrated services digital network) example, the authors show a 2048*2048 switch configuration with building blocks of 42*16 packet switch modules and 128*128 interconnect modules. >

Study of information loss in packet voice systems

Abstract: Once a voice buffer is full, it remains full for a certain period, during which many packets are possibly blocked, resulting in consecutive clippings in voice. The packet loss rate during this period changes slowly and has large fluctuations. It is shown that the temporal behavior of packet loss, especially at high rate, is inherently determined by voice correlation and system capacity and is independent of buffer size. Buffering may reduce the occurrence of short blocking periods associated with low rates packet loss but does not affect long ones associated with high packet loss rates. In fact, increasing the buffer size merely extends nonblocking periods, and thereby reduces the overall average packet loss rate, but packet-loss performance within existing blocking periods is not significantly improved. A simple tool is developed for calculating the boundary performance. It is found that it is possible to design a packet-switched voice system without buffering only at the expense of supporting a fewer number of calls. The issue of voice delay allocation between source and network is discussed, and it is shown that it is more effective to keep the network delay short while extending the source delay. >

Multiwavelength networks and new approaches to packet switching

Abstract: The author shows how the bandwidth available through the use of multiwavelength optical-fiber technology can be used to achieve novel large-capacity switching systems to address anticipated switching bottlenecks. He does so by describing the features and network applications of a specific multiwavelength network, the Bellcore LAMBDANET packet switch. The discussion is then extended to a number of recent proposals for switching fabrics based on this new multiwavelength technology. The particular technologies he discusses are: the photonic knockout switch, a proposal similar to the concept of the LAMBDANET, but not requiring N receivers at each node; the FOX (fast optical cross-connect), an active wavelength routing approach; the ShuffleNet architecture; the HYPASS and BHYPASS switches; the coherent wavelength division lambda switch; and the Bellcore Star-Track multicast switch. >

Effect of speedup in nonblocking packet switch

Abstract: The nonblocking packet switch under consideration has N inputs and N outputs and operates L times as fast as the input and output trunks. The effect of speedup (L) on packet loss probability and average transmission delay in the case of an arbitrary number L, such that 1 >

Performance analysis of spread spectrum packet radio network with channel load sensing

Abstract: A continuous-time Markov-chain model for an asynchronous communication spread-spectrum code-division-multiple-access (CDMA) packet radio network is developed. The network is composed of mutually independent users. The receiver-based code is considered; a terminal with a packet to send looks up the destination's code and transmits on that code. Each user senses the channel load and refrains from transmission if the channel load exceeds the channel threshold. The model makes it possible to study the threshold effect of channel load on the performance of the CDMA packet radio network. Improvements in performance of spread-spectrum packet radio networks due to channel-load sensing are shown. Steady-state results for throughput are obtained. >

Resequencing delay and buffer occupancy under the selective-repeat ARQ

Abstract: Consider a communication network that regulates retransmissions of erroneous packets by a selective-repeat (SR) automatic repeat request (ARQ) protocol. Packets are assigned consecutive integers, and the transmitter continuously transmits them in order until a negative acknowledgement or a time-out is observed. The receiver, upon receipt of a packet, checks for errors and returns positive/negative acknowledgement (ACK/NACK) accordingly. Only packets for which either NACK or time-out have been observed are retransmitted. Under SR ARQ, the receiver accepts packets that are out of order and must store them temporarily if it has to deliver them in sequence. The resequencing buffer requirements and the resulting packet delay constitute major factors in overall system considerations. The authors derive the distributions of the buffer occupancy and the resequencing delay at the receiver under a heavy traffic situation. This enables the network designer to determine how much buffer capacity at the receiver guarantees certain specified performance measures. >

Congestion control method and apparatus for end-to-end packet communication

Abstract: In a packet switched communications system wherein each destination data terminal sends an acknowledgment packet signalling correct receipt of packets from a source terminal, a congestion detector is provided for detecting a traffic congestion in the system to enable a packet detector. The packet detector, when enabled, detects the receipt of an acknowledgment packet from the destination terminal and stores this packet in a buffer for a specified period of time. The stored packet is then forwarded toward the source terminal upon termination of the specified time period.

System and method for measuring inter-nodal transmission delays in a communications network

Abstract: A system for measuring inter-nodal transmission delays in a communications network interconnecting a source node, a destination node and a plurality of intermediate nodes requests a response from the destination node, receives a response from the destination node and then determines both an issue time at which the request is issued by the source node and a receipt time at which the response is received by the source node A transmission delay between the source node and the destination node is deterined by calculating a difference between the issue time and the receipt time

Packet recovery and error correction in high-speed wide-area networks

Abstract: The author presents a novel technique for reducing packet loss rate in high-speed wide-area networks in which the BER (bit-error rate) is low. Grouping packets into blocks and adding a packet that computes parity over bits of all packets in a block allow a data recipient to reconstruct any single packet in a block, using the other packets and the block parity packet. The missing packet is identified by observing a sequence-number gap in the stream of incoming packets. Adding another packet containing parity information over the diagonals of a series of blocks allows the decoder to correct a single bit error and reconstruct a missing packet, both occurring in the same block. The performance of the scheme was evaluated using a model of a single-server, discrete-time, finite-capacity queue. It was found that, if the input rate of packets to the queue is such that the packet rejection probability is 10/sup -3/ and below, it is possible to find a proper value of block size for which the decoding yields a substantial reduction in packet loss rate. Further reductions are possible if the server discards not necessarily newly arrived packets but takes into consideration their block affiliations and attempts to distribute the rejected packets among the blocks to maximize the decoding capability. >

Computer interconnect system with transmit-abort function

Abstract: A computer interconnect system uses packet data transmission over serial links connecting nodes of a network. The serial links may provide simultaneous dual paths for transmit/receive. An adapter couples a CPU or the like at a node to the serial link. The adapter includes a packet memory for temporarily storing transmit packets and receive packets, along with a port processor for executing the protocol. Packets of data are transferred between the system bus of the CPU and the packet memory by a pair of data movers, one for read and one for write. All of the serial links of the system are connected to a distribution hub which forwards a transmitted packet to a destination node based upon an address sent with the packet. If the path to the destination node is busy, the hub returns a "flow control" signal to the source node, and in response to this signal the transmitted packet is aborted so that time on the network is not wasted by needless transmission that must be discarded.

Robust data broadcast over a distributed network with malicious failures

Abstract: A public-key encryption system is used to reliably transmit packets over a network subject to malicious failures. Each node on the network is associated with a public and private key. A transmission over the network identifies its originating node and also includes a digital-signature code word generated by encoding predetermined portions of the transmission using the private key of the originating node. When a transmission is received, the receiving node verifies that the transmission was originated by the identified originating node by manipulating the packet contents using the public key associated with the originating node. The packet is accepted only if the digital-signature code word in the packet corresponds to contents of the packet and the public key of the originating node.

Performance of a non-blocking space-division packet switch with correlated input traffic

Abstract: The performance of nonblocking space-division packet switches in a correlated-input traffic environment is investigated. In constructing the input traffic model, it is considered that each input is a TDM (time division multiplexing) link and connected to multiple sources. A call experiences the alternation of active and inactive periods, and periodically generates packets while in the active period. All the packets generated by each call are assigned to the same output. The output address of each call is assumed to be uniformly assigned. In this multimedia correlated-input traffic environment, it is shown that the maximum throughput of the switch is always bounded by 0.500 >

Packet communication exchange including dummy packet transmission

Abstract: A packet communication exchanging apparatus includes: a common communication channel through which a plurality of data packets are communicated; a plurality of input modules coupled to the common communication channel, for receiving the data packets and transferring the data packets to the communication channel; and, a plurality of output modules coupled to the common communication channel, for temporarily storing the data packets sent from the input modules via the communication channel, and for generating and sending a dummy packet to the communication channel when the amount of the data packets temporarily stored therein exceeds a predetermined threshold value, whereby the input module detects a packet contention occurring on the communication channel due to the dummy packet supplied thereto so as to control the data packet transmission from the input module to the communication channel

Communication system having a packet structure field

Abstract: A communication system develops an information packet (309) having a packet structure field (G) and at least one message. The message has an address (H) and information (I) associated with the address. A central station (302) accumulates and incorporates the at least one message into the information packet. The central station determines the occurrence of the at least one address and generates identifying data (435) indicating where the address occurs within the information packet. The identifying data is incorporated into the packet structure field and the information packet is transmitted. The information packet is received by at least one selective call receiver (310) capable of operating in a high power mode in order to receive the information packet and a low power mode when receiving is not being performed. The selective call receiver extracts the packet structure field and interprets the identifying data.

Topological analysis of packet networks

Abstract: The author describes a unified approach for the topological analysis of nonhierarchical and hierarchical packet networks. The approach differs from previous approaches in adopting an end-to-end mean delay objective and including a variety of practical routing constraints. These include limits on the number of paths allowed in a route, limits on the number of hops allowed in a path, and constraints due to prevalent virtual circuit implementations. For a broad range of networks, quantitative analysis based on this approach provides new insights into the complex relationships between network topology and routing and delay constraints. It is shown that the sole use of a network average delay criterion often leads to network designs that exhibit poor end-to-end mean delays for some node pairs, and that it is possible to configure networks that meet an end-to-end mean delay objective for every node pair at little or no additional cost. >

Queueing analysis of continuous bit-stream transport in packet networks

Abstract: The problem of transporting continuous bit-stream oriented (CBO) traffic through an all-packet network is examined. In the system considered, CBO traffic is packetized by collecting bits generated by a source during a fixed interval of time (packetization time) and packets from K such sources are multiplexed on a transmission link. The bit-streams are recreated at the receiving end by demultiplexing the packets and then playing out the packets of each bit-stream in sequence. The queuing system analyzed is a single-server queue with periodic arrivals and deterministic service times; the steady-state distributions of the queue length and delay are derived. The method of analysis is based on the ballot theorems and has a computational complexity of O(K), as compared to other proposed methods with complexities of O(K/sup 3/) or greater. It is shown that the delay, measured in units of the packetization time, decreases as the link bandwidth increases. Therefore, for the large capacity links, the contribution of the queuing delay to the total network delay is small compared to the packetization time. >

Buffer memory device for packet data and method of controlling the device

Abstract: A buffer memory device and method for fixed-length packet data. The write and read addresses of a memory are controlled by respectively independent pointer queues and these pointer queues are arranged to be distributed to the address data queue of any of the packet queues. When data are concentrated on a specific packet queue, the address data of packet queues low in use frequently are distributed so that the writable area of the specific packet queue can be expanded.

Method and circuitry for transmission of speech signals in a broad-band communications network

Abstract: A broad-band communications network consists of at least one broad-band packet exchange for transmission of communications signals in packets of a fixed length and one telephone exchange connected to the broad-band packet exchange by means of at least one interworking unit. Packing/depacking units are provided at the interfaces of the packet exchange to the subscriber's sets and within the respective interworking units. A control signal is sent following trunking to the packing/depacking units involved in the connection to be established for connections with a network transfer. The control signal controls the packing/depacking units such that packets of a fixed length intended for transmission of speech signals are formed or broken up, in accordance with a adjusted degree of packet filling which is reduced in comparison with the full packet capacity.

Voice data transmission system and method

Abstract: A voice data transmission system and method which can reduce transmission delay time and can remove unnatural conversation in a received voice signal due to the truncation of a head part of the voice signal. The signal transmission side of the voice data transmission system, when a voice detection signal is generated, continuously transmits, at a transmission rate faster than a usual transmission rate, a first voice data block at the time of generation of the voice detection signal as well as voice data blocks which are followed by the first voice data block and which correspond to a time duration from the generation time of the voice detection signal block to a predetermined time. In a voice detection mode, the data transmission side subjects voice data to a block formation operation and, after the block formation is completed, transmits the voice data block. The signal reception side of the data transmission system, when receiving a voice packet signal followed by the continuation of a predetermined time of silence, estimates a fluctuation absorbing delay time for the voice packet signal on the basis of transmission delay times between packets corresponding to its head part, and attaches packets corresponding in number to the estimated fluctuation absorbing delay time to the head part of the received voice packet signal.

Queueing analysis of delay constrained voice traffic in a packet switching system

Abstract: Unlike data traffic, the voice packet stream from a node has very high correlation between consecutive packets. In addition, in order for the speech to be properly reconstructed, a delay constraint must be satisfied. A queueing model that accurately predicts packet loss probabilities for such a system is presented. Analytical results are obtained from an embedded bivariate Markov chain and are validated by a simulation program. Based on this model, the impact of the delay constraint, talkspurt detection thresholds, and packet size on packet loss are studied. Two schemes, named 'instant' and 'random', for discarding late packets are considered. Simulation results show that better performance can be obtained by using the latter scheme. >

A neural network implementation of an input access scheme in a high-speed packet switch

Abstract: A neural network implementation of an input access scheme in a high-speed packet switch for broadband ISDN (integrated services digital network) is presented. In this switch, each input maintains a separate queue for each output; thus, in an (n*n) switch there will be n/sup 2/ input queues. Using synchronous operation, at most one packet per input and output will be transferred at every slot. A neural network maximizing the throughput of this switch is determined, and the form of the energy function, its optimized parameters, and the connection matrix are given. Simulations with random inputs have yielded results close to optimal throughput. This neural network can be implemented with the existing technology for medium switching sizes. >

Performance analysis of a growable architecture for broadband packet (ATM) switching

Abstract: The authors examine a growable architecture for broadband packet (asynchronous transfer mode) switching, consisting of a memoryless, self-routing interconnect fabric and modest-size packet switch modules, proposed by K.U. Eng et al. (1989). They focus on the cell loss probability, because the architecture attains the best possible delay-throughput performance if the packet switch modules use output queueing. They compute an upper bound on the cell loss probability for arbitrary patterns of independent cell arrivals, possibly including isochronous circuit connections, and show that both sources of cell loss can be made negligibly small. For example, to guarantee a cell loss probability of less than 10/sup -9/, this growable architecture requires packet switch modules of dimension 47*16, 45*16, 42*16, and 39*16 for 100%, 90%, 80%, and 70% traffic loads, respectively. The analytic techniques used to bound the cell loss probabilities are applicable to other output queueing architectures. >

Delay circuit having one of a plurality of delay lines which may be selected to provide an operation of a ring oscillator

Abstract: The delay period of a delay circuit is maintained, over time, near to a desired delay, by generating information representative of the present delay period of the delay circuit, and altering the delay period, from time to time during operation, based on the present delay information and the desired delay. The present delay is measured by a reference circuit having a delay characteristic corresponding to the delay characteristic of the delay circuit. Both the reference and multiple delay circuits are formed with the same configuration on a single integrated circuit.