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Tunnel field-effect transistor

About: Tunnel field-effect transistor is a research topic. Over the lifetime, 949 publications have been published within this topic receiving 20803 citations. The topic is also known as: TFET.


Papers
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Proceedings ArticleDOI
18 Feb 2023
TL;DR: In this article , a tunnel field effect transistor with Schottky drain was proposed for sub-10-nm applications and on-off switching characteristics were examined by examining some of the critical device parameters.
Abstract: An SD-TFET, which is a tunnel field effect transistor with Schottky drain, is proposed in this paper for sub-10-nm applications. On-off switching characteristics were examined by examining some of the critical device parameters, including the metal work-function in a Schottky drain. When designing SD- TFETs for low-power integrated circuits, a moderate Schottky drain work-function is preferred.
Patent
02 Feb 2018
TL;DR: In this article, a laser re-crystallization (LRC)-based direct bandgap GeSn P-type tunnel field effect transistor (TFET) device and a fabrication method thereof are presented.
Abstract: The invention relates to a laser re-crystallization (LRC)-based direct bandgap GeSn P-type tunnel field-effect transistor (TFET) device and a fabrication method thereof. The method comprises the stepsof selecting a Si substrate; growing a Ge epitaxial layer on a surface of the Si substrate; depositing a protection layer on a surface of the Ge epitaxial layer; crystallizing the Si substrate, the Ge epitaxial layer and the protection layer by an LRC process; etching the protection layer to form a Ge virtual substrate material; growing a GeSn epitaxial layer on a surface of the Ge virtual substrate material; and depositing a high-K grid dielectric layer and a grid material layer, photoetching a source-drain region, and finally, forming the LRC-based direct bandgap GeSn P-type TFET device. The dislocation density, the surface roughness and the interface defect of a Ge virtual substrate can be effectively reduced by an LRC process, and the quality of the Ge virtual substrate is improved; and meanwhile, the TFET device is fabricated by employing a direct bandgap GeSn material, and the defects of relatively small on-state current of a tunnel transistor and poor circuit performance can beovercome.
Patent
19 Nov 2015
TL;DR: In this article, a tunnel field effect transistor (TFET) and manufacturing method of the TFET are presented. But the authors do not specify a manufacturing method for TFETs.
Abstract: Provided is a tunnel field effect transistor (TFET) and manufacturing method thereof. The TFET comprises: a first doping type substrate (110); two drain regions (120), respectively provided on two opposite sides of the first doping type substrate (110); a first epitaxial layer (130), provided on the first doping type substrate (110) and the two drain regions (120); two source regions (140), provided on the first epitaxial layer (130), and each of the source regions (140) being corresponding to one of the drain regions (120); a gate region (150) and gate dielectric layer (160), the gate region (150) provided between the two source regions (140) and provided on the first epitaxial layer (130) via the gate dielectric layer (160), and the gate dielectric layer (160) provided between the gate region (150) and the two source regions (140). The TFET has a higher driving current, a steep sub-threshold swing, a smaller leakage current, and a higher chip integration density.
Proceedings ArticleDOI
01 Mar 2017
TL;DR: In this article, a silicon germanium-based tunnel field effect transistor (TFET) with a strained-SiGe channel was used to reduce the device operation voltage to below 0.5V.
Abstract: To overcome the fundamental limitations of conventional MOSFETs, tunneling field effect transistors (TFETs) with strained-SiGe channel (via heterogeneous integration) may be used and is demonstrated using simulation. We mainly focus on the design and implementation of silicon germanium based tunnel field effect transistor, aiming to reduce the device operation voltage down to below 0.5V. Performance improvement in drain current as high as 200% has been achieved.
Journal ArticleDOI
TL;DR: In this paper, a lateral strained double-gate TFET (SDGTFET) is presented, which has a higher on-current, low leakage, low threshold voltage, excellent sub-threshold slope, and good short channel effects.
Abstract: Tunnel field effect transistor (TFET) devices are attractive as they show good scalability and have very low leakage current. However they suffer from low on-current and high threshold voltage. In order to employ the TFET for circuit applications, these problems need to be tackled. In this paper, a novel lateral strained double-gate TFET (SDGTFET) is presented. Using device simulation, we show that the SDGTFET has a higher on-current, low leakage, low threshold voltage, excellent subthreshold slope, and good short channel effects and also meets important ITRS guidelines.

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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202340
2022107
2021119
2020135
201987
201879