Tunnel field-effect transistor

About: Tunnel field-effect transistor is a research topic. Over the lifetime, 949 publications have been published within this topic receiving 20803 citations. The topic is also known as: TFET.

Performance Enhancement of Vertical Tunnel Field-Effect Transistor with SiGe in the δp+ Layer

Abstract: The metal–oxide–semiconductor (MOS)-based vertical tunnel field effect transistor (FET) on silicon has been proposed earlier and which showed gate-controlled band-to-band tunneling from the valence band in the heavily doped δp+ layer at source to the conduction band in the inversion channel. In this work, using 2D computer simulation, we further investigate the device performance enhancement with SiGe in the δp+ layer. On-current as well as threshold voltage are seen to improve considerably and meet the roadmap technology requirements. We also show that unlike the conventional MOSFET, the subthreshold swing of the vertical tunnel FET is not limited to the theoretical value of 60 mV/dec at room temperature.

Length scaling of the Double Gate Tunnel FET with a high-K gate dielectric

Abstract: In this paper, the length scaling of the silicon Double Gate Tunnel Field Effect Transistor (DG Tunnel FET) is studied. It is found that scaling limits are reached sooner by Tunnel FETs with an SiO2 gate dielectric, while those with a high-K dielectric can be scaled further before threshold voltage, and average and point subthreshold swing are affected. It is demonstrated that the scaling of the high-K Tunnel FET is completely different than that of conventional MOS transistors. An outstanding feature of the Tunnel FET switch is that length scaling has a much weaker impact on device characteristics than does gate control (e.g. the use of a high-K dielectric), which primarily dictates the tunneling barrier width and consequently, device conduction. This paper demonstrates that while some improvements are observed, the length scaling does not dramatically affect switch figures of merit such as subthreshold slope, Ion and Ioff down to about 20 nm, and an optimized device design can be extended over a much larger window of sub-micron dimensions, compared to the MOSFET. A discussion of the length dependence of the transconductance, gm, and output conductance, gds of the Tunnel FET is presented for the first time.

Comparative Analysis of Dielectric-Modulated FET and TFET-Based Biosensor

Abstract: An extensive study is presented to describe the impact of partial hybridization on the device electrostatics and on current of a silicon dielectric-modulated tunnel field effect transistor (DM-TFET). To gain insight into the various design considerations and factors influencing the sensitivity, both process-related issue such as cavity length variation and real-time issues related to biomolecules behavior such as partial hybridization, charge, and position of receptors/target molecules have been investigated through extensive numerical simulations. The results indicate that TFET-based sensor does not suffer from scaling issues and thus can help in miniaturization without compromising the sensitivity, unlike a nanogap-embedded DM-FET.

Ultra-low-voltage bilayer graphene tunnel FET

Abstract: In this work, we propose the Bilayer Graphene Tunnel Field Effect Transistor (BG-TFET) as a device suitable for fabrication and circuit integration with present-day technology. It provides high Ion/Ioff ratio at ultra-low supply voltage, without the limitations in terms of prohibitive lithography and patterning requirements for circuit integration of graphene nanoribbons. Our investigation is based on the solution of the coupled Poisson and Schroedinger equations in three dimensions, within the Non-Equilibrium Green (NEGF) formalism on a Tight Binding Hamiltonian. We show that the small achievable gap of only few hundreds meV is still enough for promising TFET operation, providing a large Ion/Ioff ratio in excess of 10^3 even for a supply voltage of only 0.1 V. Key to this performance is the low quantum capacitance of bilayer graphene, which permits to obtain an extremely small sub-threshold swing S smaller than 20 mV/decade at room temperature.

Tunnel Field Effect Transistor With Raised Germanium Source

Abstract: The performance of a tunnel field effect transistor (TFET) with a raised germanium (Ge) source region is investigated via 2-D device simulation with a tunneling model calibrated to experimental data. The comparison of various Ge-source TFET designs shows that a fully elevated Ge-source design provides for the steepest subthreshold swing and, therefore, the largest on-state drive current for low-voltage operation. Mixed-mode (dc and ac) simulations are used to assess the energy-delay performance. In comparison with a MOSFET, an optimized Ge-source TFET is projected to provide for a lower energy per operation for throughput in the frequency range of up to ~1 GHz for sub-0.5-V operation.