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Van der Pauw method

About: Van der Pauw method is a research topic. Over the lifetime, 1682 publications have been published within this topic receiving 25364 citations.


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Journal ArticleDOI
TL;DR: In this paper, the van der Pauw method was used to measure the anisotropic transport of epitaxial graphene on silicon carbide, and the calculated maximum mobility is 2876cm2·V-1·s-1, which is 1.43 times higher than that obtained by the standard van der-Pauw method.
Abstract: The electronic transport of epitaxial graphene on silicon carbide is anisotropic because of the anisotropy of the surface structure of the substrate. In this Letter, we present a new method for measuring anisotropic transport based on the van der Pauw method. This method can measure anisotropic transport on the macroscopic scale without special equipment or device fabrication. We observe an anisotropic resistivity with a ratio of maximum to minimum of 1.62. The calculated maximum mobility is 2876cm2·V-1·s-1, which is 1.43 times higher than that obtained by the standard van der Pauw method.

11 citations

Journal ArticleDOI
TL;DR: In this article, a 10nm n-type PbTe / Pb 0.9 Eu 0.1 Te quantum well at millikelvin temperatures was measured in a Van der Pauw geometry under high magnetic fields up to 23 T. A robust signature of integer quantum Hall effect was observed without any sign of parasitic parallel conduction.
Abstract: Transport measurements have been carried out on a 10 nm n-type PbTe / Pb 0.9 Eu 0.1 Te quantum well at millikelvin temperatures. The Hall and longitudinal resistances are measured in a Van der Pauw geometry under high magnetic fields up to 23 T. A robust signature of the integer quantum Hall effect is observed without any sign of parasitic parallel conduction. The unconventional sequence of filling factors associated with the integer quantum Hall effect is discussed in terms of the occupancy of multiple valleys.

11 citations

Journal ArticleDOI
TL;DR: In this article, X-ray diffraction studies confirm that deposited thin films are polycrystalline nature with orthorhombic phase and the predominant peak has appeared along (001) direction and it is considered as preferred orientation.

11 citations

Journal ArticleDOI
TL;DR: In this paper, a NOR-type memory cell composed of a ferroelectric-gate thin-film transistor (FeTFT) and an insulated gate TFT was fabricated, which were a memory element and a select switch, respectively.
Abstract: We fabricated a NOR-type memory cell composed of a ferroelectric-gate thin-film transistor (FeTFT) and an insulated gate thin-film transistor (TFT), which were a memory element and a select switch, respectively. The FeTFT consisted of a heteroepitaxially stacked oxide structure of ZnO (n-type semiconductor)/Pb(Zr,Ti)O3 (PZT; ferroelectric)/SrRuO3 (bottom-gate electrode) on a SrTiO3 substrate. An insulated gate stack of Au/Ti (top-gate electrode)/SiNx (insulator) was formed on the ZnO film. The drain electrode of the FeTFT was common to the source electrode of the TFT. The current–voltage (Ids–Vgs) characteristics of the FeTFT exhibited a high ON/OFF ratio of 105 by applying sweeping bottom-gate voltages (Vgs) from -10 to 10 V. After the removal of gate bias, the ON and OFF states were preserved by the remnant polarization of the ferroelectric film. Moreover, the current–voltage characteristics of the TFT exhibited an ON/OFF ratio of 105. The field effect mobility of the TFT was estimated to be 25 cm2 V-1 s-1, which corresponded to an electron mobility of 26 cm2 V-1 s-1 measured for the ZnO film by a van der Pauw method. However, the field effect mobility of the FeTFT, typically 0.1 cm2 V-1 s-1, was quite different from those values. The difference in field effect mobility was attributed to whether current flowed along the ZnO/PZT or SiNx/ZnO interface. We also confirmed the write and read operations of the memory cell using pulse sequences.

11 citations

Journal ArticleDOI
TL;DR: In this paper, the authors investigated the electrical and transport properties of 3C-SiC films grown via different methods on low-doped and high-resistivity silicon substrates by using van der Pauw Hall and transfer length measurements as test vehicles.
Abstract: Heteroepitaxial 3C-SiC films on silicon substrates are of technological interest as enablers to integrate the excellent electrical, electronic, mechanical, thermal, and epitaxial properties of bulk silicon carbide into well-established silicon technologies. One critical bottleneck of this integration is the establishment of a stable and reliable electronic junction at the heteroepitaxial interface of the n-type SiC with the silicon substrate. We have thus investigated in detail the electrical and transport properties of heteroepitaxial cubic silicon carbide films grown via different methods on low-doped and high-resistivity silicon substrates by using van der Pauw Hall and transfer length measurements as test vehicles. We have found that Si and C intermixing upon or after growth, particularly by the diffusion of carbon into the silicon matrix, creates extensive interstitial carbon traps and hampers the formation of a stable rectifying or insulating junction at the SiC/Si interface. Although a reliable p-n junction may not be realistic in the SiC/Si system, we can achieve, from a point of view of the electrical isolation of in-plane SiC structures, leakage suppression through the substrate by using a high-resistivity silicon substrate coupled with deep recess etching in between the SiC structures.

11 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202328
202241
202128
202030
201960
201867