Topic
Van der Pauw method
About: Van der Pauw method is a research topic. Over the lifetime, 1682 publications have been published within this topic receiving 25364 citations.
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TL;DR: In this article, the structural and electronic properties of TaxSiyNz thin films were investigated as a function of the N and Si contents, and the optical properties were investigated by ellipsometric measurements, while the DC. electrical resistivity was measured using the van der Pauw configuration at 300 K.
8 citations
TL;DR: In this article, a Van der Pauw structure on GaAs/AlGaAs modulation-doped layers was constructed using x-ray nanolithography, evaporation, and liftoff.
Abstract: We have built four‐probe Van der Pauw structures on GaAs/AlGaAs modulation‐doped layers. On top of the 4×4 mm active area we fabricated a 200 nm period Ti/Au Schottky metal grid‐gate using x‐ray nanolithography, evaporation, and liftoff. Electrons traveling from one contact to the other suffer electron back diffraction at specific gate voltages resulting in transconductance oscillations. Magneto‐capacitance measurements indicate two sets of quantum oscillations corresponding to the charge density under and in‐between the Schottky metal lines. Far infrared cyclotron resonance measurements show a shift in the resonance peak as a function of gate bias.
8 citations
01 Jan 2003
TL;DR: In this article, a comprehensive study of sputtered TaN thin-film resistor with a low resistivity of only 150 µΩ-cm is presented, its comparison with thin film resistors fabricated by evaporated NiCr and sputtered NiV.
Abstract: This paper presents a comprehensive study of sputtered TaN thin film resistor with a low resistivity of only 150 µΩ-cm, its comparison with thin film resistors fabricated by evaporated NiCr and sputtered NiV. Sheet resistance (Rs), temperature coefficient of resistance (TCR), and voltage coefficient of resistance (VCR) were measured using a standard Van Der Pauw (VDP) structure. Thickness was measured by a profilometer as well as cross-section SEM. Biased-drift tests and thermal tests were performed to check the reliability of the thin film resistors.
8 citations
TL;DR: In this paper, a high resolution, low damage dry etching of tungsten, a suitable candidate for gate metallization in compound semiconductor based high mobility channel device, by using a Surface Technology Systems Ltd. (STS) inductively coupled plasma (ICP) etching system with SF"6 and C"4F"8 process gases was investigated.
8 citations
Patent•
08 Jul 2004TL;DR: An integrated semiconductor temperature and pressure sensor has two sets (1-2, 3-4) of series orthogonal different type piezoelectric Van der Pauw structures in MOS transistor source to drain channels with different pressure dependent electrical properties and a processor comparing the inputs.
Abstract: An integrated semiconductor temperature and pressure sensor has two sets (1-2, 3-4) of series orthogonal different type piezoelectric Van der Pauw structures in MOS (Metal Oxide Silicon) transistor source to drain channels with different pressure dependent electrical properties and a processor comparing the inputs. Includes INDEPENDENT CLAIMs for the procedures used by the system.
8 citations