Showing papers on "Very-large-scale integration published in 1977"

Architecture for contemporary computer aids to generate IC mask layouts

Abstract: A new automatic layout code (Sandia Integrated Circuit Layout Program System-SICLOPS) is being developed which avoids earlier problems, provides flexibility for designing ICs using different technologies, and provides the basis necessary to design highly complex chips bordering on VLSI complexity. The SICLOPS layout approach relies on a structured hierarchical layout using modules consisting of assemblies of standard cells or bonding pads and macrocells. One of the keys to efficiency is the use of the same routing algorithms at each stage of the layout to optimize the layout for the individual modules prior to incorporating the modules in the overall chip layout. The SICLOPS program is expected to generate a CMOS IC layout using a silicon gate technology which is approximately a factor of five higher in device density than a metal gate technology. (RWR)

Static Induction Transistor Logic

Abstract: The static induction transistor logic (SITL) equivalent to PL is evaluated by fabricating type D-F/F frequency divider and 14 bit BCD programmable counter to prove its potentiality in VLSI. SITI2L is also implemented into LSI. The normally-configured SIT is introduced to serve as a driver transistor in the SITL having new circuit configuration in order to improve the speed performance, where output Schottky diodes are fabricated to ensure the decoupling between outputs. The performance of this Schottky SITL is evaluated in the ring oscillator, where the propagation delay is obtained 2.5 nsec at a power dissipation of 100 µW.