scispace - formally typeset
Search or ask a question
Topic

VHDL

About: VHDL is a research topic. Over the lifetime, 8737 publications have been published within this topic receiving 73719 citations. The topic is also known as: Very High Speed Integrated Circuit Hardware Description Language & VHSIC Hardware Description Language.


Papers
More filters
Journal ArticleDOI
TL;DR: An overview of the VHDL-AMS hardware description language for analog and mixed-signal applications can be found in this paper, where the major elements of the language are described and illustrated by examples.
Abstract: This paper provides an overview of the VHDL-AMS hardware description language for analog and mixed-signal applications, by describing the major elements of the language and illustrating them by examples.

278 citations

Patent
03 Jun 1998
TL;DR: In this article, a hardware-oriented verification-specific object-oriented programming language is used to construct and customize verification tests, and a test generator module automatically creates verification tests from a functional description.
Abstract: A method and apparatus are provided for functionally verifying an integrated circuit design. A hardware-oriented verification-specific object-oriented programming language is used to construct and customize verification tests. The language is extensible, and shaped to provide elements for stimulating and observing hardware device models. The invention is platform and simulator-independent, and is adapted for integration with Verilog, VHDL, and C functions. A modular system environment ensures interaction with any simulator through a unified system interface that supports multiple external types. A test generator module automatically creates verification tests from a functional description. A test suite can include any combination of statically and dynamically-generated tests. Directed generation constrains generated tests to specific functionalities. Test parameters are varied at any point during generation and random stability is supported. A checking module can perform any combination of static and dynamic checks. Incremental testing permits gradual development of test suites throughout the design development process. Customized reports of functional coverage statistics and cross coverage reports can be generated. A graphical user interface facilitates the debugging process. High-Level Verification Automation facilities, such as the ability to split and layer architecture and test files, are supported. Both verification environments and test suites can be reused.

276 citations

Book
06 Jul 2001
TL;DR: In this article, the authors present VHDL Packages for communication protocols, sets and relations, as well as relations between sets and relationships between relations. But they do not discuss the relationships between sets.
Abstract: Preface. Acknowledgments. Introduction. Communication Channels. Communication Protocols. Graphical Representations. Huffman Circuits. Muller Circuits. Timed Circuits. Verification. Applications. Appendix A: VHDL Packages. Appendix B: Sets and Relations. References. Index.

252 citations

Proceedings ArticleDOI
19 Apr 1995
TL;DR: Using higher-level languages, like VHDL, facilitates the development of custom operators without significantly impacting operator performance or area, as well as properties, including area consumption and speed of working arithmetic operator units used in real-time applications.
Abstract: Many algorithms rely on floating point arithmetic for the dynamic range of representations and require millions of calculations per second. Such computationally intensive algorithms are candidates for acceleration using custom computing machines (CCMs) being tailored for the application. Unfortunately, floating point operators require excessive area (or time) for conventional implementations. Instead, custom formats, derived for individual applications, are feasible on CCMs, and can be implemented on a fraction of a single FPGA. Using higher-level languages, like VHDL, facilitates the development of custom operators without significantly impacting operator performance or area. Properties, including area consumption and speed of working arithmetic operator units used in real-time applications, are discussed.

248 citations


Network Information
Related Topics (5)
CMOS
81.3K papers, 1.1M citations
82% related
Key distribution in wireless sensor networks
59.2K papers, 1.2M citations
81% related
Integrated circuit
82.7K papers, 1M citations
79% related
Software
130.5K papers, 2M citations
79% related
Wireless sensor network
142K papers, 2.4M citations
79% related
Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202368
2022185
2021141
2020182
2019221
2018218