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Showing papers on "Voltage-controlled oscillator published in 1977"


Patent
21 Nov 1977
TL;DR: In this paper, a digital clock signal tracks a pulse stream data signal by developing two phase-lock restorative voltages through a phase-locked loop circuit which control the loop VCO that generates the clock signal, one voltage designated as fine, being developed through a digital up/down counter and a digital/analog converter whenever the phase difference between the two signals exceeds a first threshold, and the second voltage, designated as coarse being generated by combining with the fine voltage a voltage to reduce or increase its value before application to the VCO so that the altered control voltage rapidly
Abstract: A digital clock signal tracks a pulse stream data signal by developing two phase-lock restorative voltages through a phase-locked loop circuit which control the loop VCO that generates the clock signal, one voltage, designated as fine, being developed through a digital up/down counter and a digital/analog converter whenever the phase difference between the two signals exceeds a first threshold, and the second voltage, designated as coarse being generated by combining with the fine voltage a voltage to reduce or increase its value before application to the VCO so that the altered control voltage rapidly restores phase-lock whenever the phase difference exceeds a second threshold greater than that of the first.

64 citations


Journal ArticleDOI
TL;DR: In this article, the authors apply the analytic signal in oscillation theory, which allows one to determine the amplitude, phase, and frequency of any oscillation at any instant of time.
Abstract: This review is concerned with applying the analytic signal in oscillation theory, where the concept of the analytic signal was hardly ever applied until recently. We treat the mathematical properties of the Hilbert transform and of the analytic signal, which allow one to determine the amplitude, phase, and frequency of any oscillation at any instant of time. For narrow-band oscillations and for broad-band oscillations that arise under slow frequency modulation, this definition agrees with the intuitive meaning of amplitude, phase, and frequency and with the quasistationary approximation, while allowing one to estimate the limits of applicability of the latter. We show that a number of radiotechnical devices (mixers, frequency modulators, detectors, frequency discriminators, etc.) transform the parameters of an oscillation as defined by the analytic signal. We establish the relationship between the adiabatic invariant and the equation of the oscillations for the analytic signal. This relationship allows one to construct a complete theory of the triode oscillator having a cubic characteristic, in which the capacity of the circuit and the transconductance of the tube slowly fluctuate. Here we get a new result in the second approximation, namely: we calculate the influence of the flicker effect on the instantaneous frequency of the oscillator; the corresponding spectral line width is substantial in practice. In conclusion, we treat some paradoxes and supplementary examples that illustrate the technical and physical significance of the introduced concepts.

51 citations


Patent
11 Feb 1977
TL;DR: In this paper, a circuit for dejittering transmitted digital data is proposed, where a buffer stores the incoming data and has its half-full condition monitored by content decoding circuitry including a counter whose count is converted to control the frequency of a voltage controlled oscillator.
Abstract: A circuit for dejittering transmitted digital data. A buffer stores the incoming data and has its half-full condition monitored by content decoding circuitry including a counter whose count is converted to control the frequency of a voltage controlled oscillator. The oscillator clocks the data out of the buffer effectively free of harmful jitter.

49 citations


Patent
09 May 1977
TL;DR: In this paper, the authors present a tuning system for a television receiver which includes a phase-locked loop for tuning a local oscillator to the nominal local oscillators frequencies required to tune the receiver to RF carriers at standard broadcast frequencies allocated to the various channels a viewer may select.
Abstract: RCA 70,849 TELEVISION TUNING SYSTEM WITH PROVISIONS FOR RECEIVING RF CARRIER AT NONSTANDARD FREQUENCY Abstract of Disclosure A tuning system for a television receiver includes a phase locked loop for tuning a local oscillator to the nominal local oscillator frequencies required to tune the receiver to RF carriers at standard broadcast frequencies allocated to the various channels a viewer may select. The tuning system also includes an automatic fine tuning (AFT) frequency discriminator fox tuning the local oscillator to minimize any deviation between the frequency of an actual picture carrier and the nominal picture carrier frequency. If the receiver is coupled to a television distribution system which provides RF carriers having nonstandard freq-uencies arbitrarily near respective ones of the standard broadcast frequencies, when the phase locked loop has achi-eved lock at a nominal frequency, a mode control unit selectively couples the discriminator and a frequency drift control circuit to the local oscillator. If the frequency of the local oscillator drifts more than a predetermined off-set from the frequency synthesized under phase locked loop control because no carrier has been detected by the discrim-inator, discriminator and drift control are terminated so that the receiver will not be tuned to an undesired carrier such as, for example, the lower adjacent channel sound carr-ier, and phase locked loop control is reinitiated to synthe-size a local oscillator signal having a frequency incremented from the frequency of the originally synthesized local oscillator signal by a predetermined amount. After the phase locked loop is locked at an incremented frequency, discriminator control is again initiated. If, during this cycle of discriminator control, the local oscillator again drifts more than the predetermined offset from the RCA 70,849 incremented local oscillator frequency because no carrier is detected by the discriminator, phase locked loop control is again reinitiated to synthesize a local oscillator signal having a frequency decremented from the frequency of the originally synthesized local oscillator signal by the pre-determined amount. If during any discriminator control cycle the local oscillator has not drifted further than the predetermined offset because the discriminator has tuned the local oscillator to a carrier within the predetermined offset, phase locked loop control is not reinitiated and the tuning sequence is complete. -1a-

47 citations


Patent
12 Sep 1977
TL;DR: In this paper, the VCO is comprised of first and second nested oscillating loops and a control voltage is coupled to at least one of the N inverters to vary its conductivity and cause the frequency of oscillation of the two loops to change.
Abstract: The VCO is comprised of first and second "nested" oscillating loops. The first loop includes M cascaded inverters interconnected to normally oscillate at a given fixed frequency. The second loop includes N cascaded inverters where the input of the first of the N inverters is connected to the output of one of the M inverters and where the output of the Nth inverter is coupled to the output of a different one of the M inverters, whereby at least one of the M inverters is common to the two loops, and where M and N are integers. A control voltage is coupled to at least one of the N inverters to vary its conductivity and cause the frequency of oscillation of the two loops to change.

36 citations


Journal ArticleDOI
01 Nov 1977
TL;DR: In this article, a simple voltage controlled oscillator circuit using capacitors, all of which are grounded, is presented, and the frequency of oscillation can be varied over a wide range, with the amplitude remaining relatively stable over the range.
Abstract: A simple voltage controlled oscillator circuit using capacitors, all of which are grounded, is presented. The circuit is thus attractive from the point of view of monolithic or hybrid IC fabrication. The frequency of oscillation can be varied over a wide range, with the amplitude of oscillation remaining relatively stable over the range. Experimental results are given that agree closely with the theoretical predictions.

35 citations


Patent
10 Jun 1977
TL;DR: In this article, a digitally controlled microwave phase lock loop for switching rapidly from one lock frequency to another is disclosed, where a digital word corresponding to a desired input voltage for a selected frequency is converted to an analog voltage for application to the coarse tuning port of the loop's voltage controlled oscillator.
Abstract: A digitally controlled microwave phase lock loop for switching rapidly from one lock frequency to another is disclosed. A digital word corresponding to a desired input voltage for a selected frequency is converted to an analog voltage for application to the coarse tuning port of the loop's voltage controlled oscillator. Prior to switching to another frequency, the error voltage for the fine tuning port is compared with a zero error reference voltage. The least significant bit of the digital word for such frequency is increased or decreased by one depending on the direction difference between the compared voltages. This incrementally changed word controls the coarse tuning voltage during the next selection of the particular frequency. The system is initialized by repetitively selecting each of the possible frequencies until the digital word for each selected frequency is within one increment of the zero error reference voltage for the fine tuning port.

34 citations


Patent
20 Jun 1977
TL;DR: In this paper, a random access digital control memory coupled with the voltage control terminal of a voltage controlled oscillator is used to detect nonlinearities in the chirp which may be substantially reduced by reprogramming of the control memory.
Abstract: A method of linearizing a voltage controlled oscillator wherein a control signal is shaped into ramp form by a memory and transmitted to the control input terminal of a voltage controlled oscillator to be linearized thereby causing the oscillator to generate a chirp. Nonlinearities in the chirp are detected and the memory reprogrammed so as to diminish detected nonlinearities by reshaping the ramp control signal. A system for linearizing a voltage controlled oscillator is also disclosed having a random access digital control memory coupled with the voltage control terminal of a voltage controlled oscillator to be linearized, a power divider coupled with the output terminal of the oscillator, a mixer coupled with the power divider by two conductive lines of differing time delays, and an x-y axis signal display coupled with the mixer, whereby the memory may be programmed to input a ramp control signal to the oscillator and difference frequency signal detected in the chirp output signal generated by the oscillator and compared with a reference frequency signal on the display to detect nonlinearities in the chirp which may be substantially reduced by reprogramming of the control memory.

30 citations


Patent
23 Sep 1977
TL;DR: In this paper, the output of a fast frequency hopping VCO is mixed with the output from a conventional slow acquisition frequency synthesizer to produce an IF which is applied to a frequency discriminator where the IF is compared with a reference IF to provide an error signal which is digitized and stored in a memory.
Abstract: The output of a fast frequency hopping VCO is mixed with the output of a conventional slow acquisition frequency synthesizer to produce an IF which is applied to a frequency discriminator where the IF is compared with a reference IF to provide an error signal which is digitized and stored in a memory. Subsequently, the error signal is applied together with a command signal to the VCO to obtain the desired frequency output.

29 citations


Journal ArticleDOI
TL;DR: It will be advantageous to use this new loop in all applications where a simultaneous need for large acquisition range and a narrow tracking bandwidth can justify the added complexity of the new loop.
Abstract: A new electronic subsystem has been developed: The frequency and phase lock loop. It has an extended acquisition range compared to the standard phase lock loop. It will be advantageous to use this new loop in all applications where a simultaneous need for large acquisition range and a narrow tracking bandwidth can justify the added complexity of the new loop.

28 citations


Patent
02 May 1977
TL;DR: In this article, an apparatus and method for modulating color contributions in visual displays with audio modulating signals is described. But the method is not suitable for high-resolution displays.
Abstract: Disclosed are apparatus and method for modulating color contributions in visual displays with audio modulating signals. Particular embodiments disclosed separate input audio frequency signals into modulating signals characterized by particular frequency ranges. At least one such modulating signal is operated on by a gating circuit controlled by enabling signals from a voltage controlled oscillator. A level detector samples the modulating signal and feeds control signals to the voltage controlled oscillator in response to values of amplitude detected in the modulating signal. Generation and processing of the modulating signals may be provided as part of a visual display system such as a color television receiver or eidophor system, or such signals may be transmitted through the antenna input of such a system. Each electron gun in the visual display system is then modulated by a different modulating signal, resulting in varied color displays in response to the frequency and magnitude of the input audio frequency signals.

Patent
08 Jun 1977
TL;DR: In this paper, a heterodyne phase lock system is disclosed having a plurality of oscillator circuits, at least one of the oscillator circuit being a voltage controlled oscillator (VCO) circuit, and the control circuit includes a phase lock circuit, which is responsive to an applied reference signal for adjusting the output of the VCO.
Abstract: A heterodyne phase lock system is disclosed having a plurality of oscillator circuits, a similar plurality of heterodyne (mixer-filter) circuits representing an input circuit, and a similar plurality of heterodyne circuits representing a control circuit, at least one of the oscillator circuits being a voltage controlled oscillator (VCO) circuit. The heterodyne circuits of the input circuit are cascaded, i.e., linked each to the other, successively, and the heterodyne circuits of the control circuit are likewise cascaded. Each oscillator is linked to a pair of heterodyne circuits, i.e., to one heterodyne circuit in the input circuit and to one heterodyne circuit in the control circuit, and applies a common output signal to said pair of heterodyne circuits. The control circuit includes a phase lock circuit, and is responsive to an applied reference signal for adjusting the output of the VCO and correcting for or substantially cancelling frequency drift, residual FM, and phase noise introduced into the system by the oscillators. This manner of linking oscillators to both heterodyne input and control circuits in a system so as to be able to correct, by adjusting a single oscillator, for frequency drift, residual FM, and phase noise from all of the oscillators in the system, is applicable to receiver and generator type systems alike. The system also includes an offset oscillator for tuning the system.

Patent
Thomas F. Coe1
05 Jan 1977
TL;DR: In this article, a phase-locked loop oscillator circuit including a voltage controlled oscillator and a reference frequency source is presented, from each of which a signal is derived and the phases of these two signals are compared in a phase detector, the output of which is applied through a loop filter to a frequency modulation input of the VOC.
Abstract: In a typical phase-locked loop oscillator circuit including a voltage controlled oscillator and a reference frequency source, from each of which a signal is derived and the phases of these two signals are compared in a phase detector, the output of which is applied through a loop filter to a frequency modulation input of the voltage controlled oscillator, so that the frequency of the voltage controlled oscillator is precisely controlled by the reference frequency; an improvement which comprises a maximum phase error detector which determines a maximum permitted phase error between the two inputs to the phase detector, and a phase error corrector circuit which, in response to the presence of a maximum permitted phase error, will shift the phase of one of the two signals applied to the phase detector relative to the source of that signal, such as to hold the phase error into the phase detector within the permitted maximum. This causes the voltage controlled oscillator to shift its frequency to the lock-up frequency in a smooth and steady manner. The improvement prevents operation of the system from being disrupted when the circuit falls out of lock, such as when the modulating signal has large low frequency components. The circuit also includes an out-of-lock detector which responds essentially instantaneously to an in-lock and out-of-lock condition and a means for altering the characteristics of the loop filter in order to minimize the effect of the out-of-lock condition upon the voltage controlled oscillator.

Patent
06 Jul 1977
TL;DR: In this article, a phase-locked loop (PLL) is used to control the oscillating frequency of a voltage controlled oscillator (VCO) in the PLL.
Abstract: A frequency synthesizer including a phase-locked loop (PLL) is provided which does not use any variable frequency divider. The output of a reference frequency oscillator is applied to a phase comparator in the PLL through a monostable multivibrator. The oscillating frequency of a voltage controlled oscillator (VCO) in the PLL can be selected by controlling a bias DC voltage applied to a control element in the VCO. The output waves from said VCO are counted at a counter during a period of the reference frequency from the reference frequency oscillator of the PLL. The count operation is repeated at a predetermined time interval. After completion of each count operation, the number in the counter corresponding to the least digit column of the decimal number is discriminated to determine whether it is within a predetermined range or not. The range is determined correspondingly to a locking range of the PLL. When it is within the range, the PLL is placed into an operating condition to stabilize the oscillating frequency of the VCO at a desired frequency. Also, the counted number is indicated by an indicator. The number in the counter corresponding to the least digit column of the decimal number may be converted into an analogue signal to automatically control the oscillating frequency of the VCO.

Patent
18 Apr 1977
TL;DR: In this article, a frequency synthesizer capable of rapidly changing to a different desired output frequency includes a voltage-controlled oscillator and a variable frequency divider arranged in a phase-locked loop.
Abstract: A frequency synthesizer capable of rapidly changing to a different desired output frequency includes a voltage-controlled oscillator and a variable frequency divider arranged in a phase-locked loop. A first frequency-control voltage is initially applied to the voltage-controlled oscillator to cause a rapid change in its output frequency toward a desired value. Then, the divisor of the variable frequency divider is changed to produce a second frequency-control voltage which precisely sets and maintains the oscillator output frequency at the desired value.

Patent
16 Mar 1977
TL;DR: In this paper, an active retrodirective antenna array with a reference array element is used to generate a phase reference which is replicated at succeeding elements of the array by proper filtering and mixing, a phase component may be produced to which the VCO may be locked to produce the phase conjugate of the pilot signal at the next array element plus a transmission line delay.
Abstract: An active retrodirective antenna array wherein a reference array element is used to generate a phase reference which is replicated at succeeding elements of the array. Each element of the array is associated with a phase regeneration circuit and the phase conjugation circuitry of an adjacent element. In one implementation, the phase reference circuit operates on the input signal at the reference element, a voltage controlled oscillator (VCO) output signal and the input pilot signal at the next array element received from a transmission line. By proper filtering and mixing, a phase component may be produced to which the VCO may be locked to produce the phase conjugate of the pilot signal at the next array element plus a transmission line delay. The same phase conjugation process occurs at the next element where the proper phase reference is regenerated by mixing samples of the input pilot and transmitted signal. In another implementation, particularly suited for large arrays in space, two different input pilot frequencies are employed. Their difference is the phase reference of the system, and a local oscillator is used in obtaining this difference, which is in the IF range. The two pilot frequencies are selected in accordance with particular criteria to insure proper phase addition and elimination of local oscillator components. Appropriate mixing and filtering is performed to achieve phase conjugation and phase reference replication.

Patent
Gary E. Swager1
31 Oct 1977
TL;DR: In this paper, a system for changing the rate of a bit clock based on errors of individual facets of a rotating polygon utilized in laser scanning system is presented. But the system is limited to a single-faceted polygon.
Abstract: A system for changing the rate of a bit clock based on errors of individual facets of a rotating polygon utilized in laser scanning system, the errors that exist between facets causing the velocity of the scan associated with the facet to be different from other scans. Facet erros are detected initially by having a start of scan pulse initiate a bit clock counter which counts the clock pulses generated by a voltage controlled oscillator. The counter provides an output to an interval detector when a desired total bit count for a scan line is reached. At some time with respect to the counter output an end of scan pulse is generated. The interval between the counter output and the end of scan pulse is the error for a particular facet. Logic allows memory locations to be addressed and loaded with the errors produced by the remaining facets in sequence, the sequence being continually repeated as the polygon rotates. During the time between the end of scan and start of scan pulses for a scan line, the error for the next facet is read out of memory to a digital to analog converter, which changes the frequency of the voltage controlled oscillator. If the error indicates the scan velocity is slow for the next facet, the oscillator frequency is reduced. If the error indicates the scanned velocity is fast for the next facet, the oscillator frequency is increased.

Patent
04 Oct 1977
TL;DR: In this paper, a circuit which decreases the time required for certain phase-locked loops to pull in, that is, the time for the frequency of the oscillator which the loop controls to go from some initial error to some specified smaller error is presented.
Abstract: This invention concerns a circuit which decreases the time required for certain phase-locked loops to pull in, that is, the time for the frequency of the oscillator which the loop controls to go from some initial error to some specified smaller error. The circuit is utilized with a loop employing an integrating element in the loop filter in conjunction with a logic circuit for indicating out-of-lock condition plus the sign of the frequency error and utilizes a source of direct current (DC) which is connected to the loop filter so as to increase the rate of change of the correction signal to the controlled oscillator and thereby speed-up tuning of the oscillator to the desired frequency.

Patent
02 May 1977
TL;DR: In this article, a microwave or ultrasonic detection system is disclosed which has a voltage controlled transmitter oscillator, and the output of the transmitter is transmitted into a designated area from a transmit antenna and is reflected by objects in the area and received by means of a second antenna.
Abstract: A microwave or ultrasonic detection system is disclosed which has a voltage controlled transmitter oscillator. The output of the transmitter oscillator is transmitted into a designated area from a transmit antenna and is reflected by objects in the area and received by means of a second antenna. The reflected signal is phase compared to the output of the transmitter oscillator. A phase error signal is generated that varies with the phase difference, and this signal is input to the transmitter oscillator to cause the frequency of the oscillator to vary in such a way to produce a null phase difference. When the position of an object which reflects the transmitted signal is changed, the length of the propagation path for the signal changes which produces a phase error signal. This phase error signal in turn causes the transmitter oscillator to shift frequency. Thus, either the output of the phase comparator or a change in the frequency of the output of the transmitter oscillator indicates a change in position of objects in the field of the transmitted signal. Range to the object is measured by phase locking at two ranges which differ by a known distance.

Patent
10 Nov 1977
TL;DR: In this article, a phase-locked motor is driven by applying cyclical or digital data through a phase locked loop whose loop filter integrates with a time constant equal to or greater than the inertial delay of the motor from start to its operating speed.
Abstract: A synchronous motor is driven by applying cyclical or digital data through a phase locked loop whose loop filter integrates with a time constant equal to or greater than the inertial delay of the motor from start to its operating speed. According to one embodiment, the frequency output of the phase locked loop is further controlled with a digital rate multiplier whose phase effects are minimized by operating the VCO at a multiple of the input frequency and feeding the VCO voltage back through a frequency divider. According to another embodiment, the frequency control is obtained with a preliminary phase locked loop with a normal filter but a high frequency VCO whose feedback is divided by a value n, and then dividing the output of the main loop by m. Suitable counters may be used to stop and start the drive.

Patent
13 Oct 1977
TL;DR: In this paper, a phase detector coupled to a differential amplifier is also coupled when an a.c. signal indicates an out-of-lock condition, which causes a switch means to short out a narrow band filter which is serially coupled with a wideband filter between the differential amplifier and an oscillator.
Abstract: A phase lock loop operable with narrow band filtering characteristics in-lock and wideband acquisition characteristics when an out-of-lock condition is detected. The phase lock loop comprises a phase detector coupled to a differential amplifier to which a step ramp voltage is also coupled when an a.c. signal, which indicates an out-of-lock condition, is coupled from the phase detector to an out-of-lock detector. The a.c. signal from the phase detector also causes a switch means to short out a narrow band filter which is serially coupled with a wideband filter between the differential amplifier and a voltage controlled oscillator. The frequency of the voltage controlled oscillator is caused to vary by the a.c. signal until lock-in is achieved at which time, the out-of-lock detector stops and holds the step ramp voltage at the value required to achieve lock and the switch means reintroduces the narrow band filter to the loop. The phase lock loop acquisition characteristics are not limited by the required filtering characteristics.

Patent
02 Mar 1977
TL;DR: In this article, a tank circuit including a quartz vibrator and a phase shifter connected to the tank circuit was used for forming a vector signal from the tank and a vector delay signal from a predetermined angle from the signal e 1.
Abstract: A tank circuit including a quartz vibrator and a phase shifter connected to the tank circuit for forming a vector signal e 1 from the tank circuit and a vector signal e 2 delayed a predetermined angle from the signal e 1 . A differential circuit is used to subtract e 1 from e 2 thus forming a difference signal e 3 . The delayed signal e 2 is inverted by a phase inverting circuit to obtain two signals e 2 and -e 2 which are applied to an addition circuit where their relative amplitude ratio is controlled. The addition cicuit adds signal e 3 to the signals e 2 and e 3 whose relative amplitude ratio has been controlled for producing a sum signal which is fed back to the tank circuit.

Patent
27 Dec 1977
TL;DR: In this paper, the nonlinear characteristics of a voltage controlled oscillator (VCO) in a phase-locked loop are approximately matched by a single diode in the audio circuitry to provide an essentially constant frequency deviation over the entire frequency range of the phaselocked loop during frequency modulation.
Abstract: The nonlinear characteristics of a voltage controlled oscillator (VCO) in a phase-locked loop are approximately matched by a single diode in the audio circuitry to provide an essentially constant frequency deviation over the entire frequency range of the phase-locked loop during frequency modulation of the phase-locked loop. A compensating circuit which incorporates the diode samples the error voltage of the phase lock loop and biases the diode accordingly. The audio signal is converted to a current which in turn is used to modulate the bias current through the diode. The resulting AC voltage across the diode is thereby amplitude compensated by the bias current to approximately match the nonlinear characteristics of the VCO at each frequency setting of the phase-locked loop.

Patent
12 Jan 1977
TL;DR: In a multi-element array of laser oscillators, each having a control input for adjusting the output laser light frequency thereof, apparatus for phase and frequency locking each oscillator of the array to a reference laser oscillator are used as mentioned in this paper.
Abstract: In a multi-element array of laser oscillators, each having a control input for adjusting the output laser light frequency thereof, apparatus for phase and frequency locking each laser oscillator of the array to a reference laser oscillator. An optical phase shifter cooperates with the reference laser oscillator and with a radio frequency source to provide a local oscillator energy source. Mixing of the local oscillator energy with that of a respective one of the array oscillators by photodetector and then phase detection of the mixed or down-converted signals, relative to the radio frequency source, provides a control signal for phase and frequency control of the array oscillator.

Patent
Adler Karl-Heinz Dipl Ing1
16 Aug 1977
TL;DR: In this paper, a transducer is provided which is formed as a segmental element providing a first or starting pulse at a certain angular position of the crankshaft of the engine.
Abstract: To simplify electronic fuel injection or ignition signal generation, a transducer is provided which is formed as a segmental element providing a first or starting pulse at a certain angular position of the crankshaft of the engine and a second or termination pulse when the crankshaft of the engine has moved through a predetermined angle. A frequency controllable oscillator, typically a voltage controlled oscillator (VCO) forming part of a phase locked loop (PLL) provides counting pulses to a first counter 12, the first counter counting from the start to a termination number and then providing the trigger signal. A second counter 13 is included in the PLL and counting pulses from the oscillator in the interval between the start and the termination signals, the count being compared with a number introduced in the PLL so that the frequency of the VCO will change with change of speed of the engine and the time when the first counter, as controlled by the frequency of the VCO, will have reached its predetermined count state will be controlled in dependence of the time interval during rotation of the shaft through the predetermined angle. A third counter 24 can be connected to the first counter 12 to introduce a number therein derived parameters of the engine, or in accordance with functional characteristics thereof to preset a number into the first counter 12 and thus modify the time of generation of the trigger pulse, the first counter then, preferably, being a reverse or down counter counting to 0 or null.

Journal ArticleDOI
B. Kriegbaum1, Flemming Pedersen1
TL;DR: In this paper, a low-frequency quadrature VCO is made to track the synchrotron frequency or harmonics hereof from analogue information about bending magnet field (momentum) and RF voltage.
Abstract: Precisely tracking band-pass filters centred at the sixth and seventh harmonic of the revolution frequency are required1). During the accelerating cycle of 0.6 sec the frequency changes by a factor 2.7. The resulting tracking problem is solved by active two-path filters, where the centre frequency is governed by the frequency of a pair of sinusoidal signals in quadrature, which are generated from the accelerating RF frequency (fifth harmonic) by means of a phase-locked loop and a loop-controlled phase shifter. The phase change caused by the large frequency sweep (6 or 7 MHz) in conjunction with the delay in the feedback loop (cables, etc.) is compensated by a digital system, which computes the required phase advance from the value of the RF frequency and controls digitally the phase shift of the two-path filters. A low-frequency quadrature VCO is made to track the synchrotron frequency or harmonics hereof from analogue information about bending magnet field (momentum) and RF voltage. This quadrature pair ensures tracking of single sideband filters which permit each individual mode sideband to be examined throughout the cycle. A drive system can, by means of a similar VCO, generate any desired mode sideband, and thus excite any given mode.

Patent
30 Jun 1977
TL;DR: In this paper, an electronic timepiece with a main oscillator and a secondary oscillator circuit for reducing the effect of temperature on the accuracy of the timepiece is provided. And a display is provided for displaying actual time in response to receiving a low frequency time signal produced by divider circuitry.
Abstract: An electronic timepiece having a main oscillator circuit and also having a secondary oscillator circuit for reducing the effect therefore of temperature on the accuracy of the timepiece is provided. The main oscillator circuit includes a first time standard and produces a high frequency time standard signal having a first frequency rate that is determined at least in part by the temperature characteristic of the first time standard. The secondary oscillator circuit includes a second time standard and produces second high frequency time standard signals having a second predetermined frequency determined at least in part by the temperature characteristic of the second time standard. Phase detection circuitry is provided for producing a phase detection signal in response to detecting a predetermined frequency difference in phase between the first and second high frequency time standard signals. A display is provided for displaying actual time in response to receiving a low frequency time signal produced by divider circuitry. A frequency adjustment circuit is coupled intermediate the phase detection circuitry and the divider circuitry for adjusting the frequency of the low frequency time signal produced by the divider circuitry in response to the phase detection signal being applied thereto.

Patent
10 Jan 1977
TL;DR: In this paper, a first phase locked loop configuration for tuning a local oscillator to a nominal frequency appropriate for converting a standard radio frequency carrier allocated to a selected channel to a predetermined intermediate frequency (e.g., 45.75 MHz) and a second phase lock loop configuration to minimize any deviation between the actual frequency of the I.F. picture carrier and its nominal frequency which may occur, for example, because the receiver is coupled to a distribution system utilizing frequency conversion apparatus which provides nonstandard radio frequency carriers arbitrarily near respective standard frequency carriers.
Abstract: Television tuning apparatus includes a first phase locked loop configuration for tuning a local oscillator to a nominal frequency appropriate for converting a standard radio frequency carrier allocated to a selected channel to a predetermined intermediate frequency (e.g., 45.75 MHz) and a second phase locked loop configuration for tuning the local oscillator to minimize any deviation between the actual frequency of the I.F. picture carrier and its nominal frequency which may occur, for example, because the receiver is coupled to a distribution system utilizing frequency conversion apparatus which provides nonstandard radio frequency carriers arbitrarily near respective standard frequency carriers. The two phase locked loop configurations include common elements and control apparatus to selectively initiate the operation of one loop while inhibiting the operation of the other in accordance with a predetermined tuning algorithm.

Patent
13 Sep 1977
TL;DR: In this article, a motor speed control system for reducing instantaneous speed variations as a result of hunting in hysteresis synchronous motors utilized to drive optical scanners by controlling the frequency of the drive signal applied to the motor is presented.
Abstract: A motor speed control system for reducing instantaneous speed variations as a result of hunting in hysteresis synchronous motors utilized to drive optical scanners by controlling the frequency of the drive signal applied to the motor. A laser beam is reflected from the facets of the optical scanner and scans a surface along a scan line, a signal being generated at the start and end of each scan line. A counter is driven by an accurate clock which is started and stopped in accordance with the start and end of scan signals. The resulting count of the counter is thus inversely proportional to the speed of the motor and is converted to an analog input signal and coupled to a voltage controlled oscillator whose frequency is controlled for driving the motor such that undesirable oscillations of the motor are damped out. Additional embodiments for controlling the motor speed are disclosed which utilize only the start of scan signal to both start and stop the counter.

Patent
09 Jun 1977
TL;DR: In this article, a pair of active probes and a datum probe are affixed to the patient, and the active probes' signals are coupled to a preamplifier involving both common mode rejection and differential amplification.
Abstract: A pair of active probes and a datum probe are affixedto the patient, and the active probes' signals are coupled to a preamplifier involving both common mode rejection and differential amplification. The information bearing voltage levels are coupled to a voltage controlled oscillator, the output of which bears information in the form of frequency variations. A photocoupler isolates the patient from unwanted feedback, and drives a phase locked loop which demodulates the signal back to an information bearing voltage. The derivative of the voltage signal is taken, is separated by polarity to correspond to the direction of eye motion, and is coupled to the EEG, thereby representing nystagmus velocity.