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Showing papers on "Voltage-controlled oscillator published in 1981"


Patent
16 Sep 1981
TL;DR: In this paper, the identification portion resonates at certain frequencies determined by a variable reactance in the resonant circuit in the identifier which is responsive to bits from a sequential data register.
Abstract: An electronic identification and recognition system in which the recognition portion includes a voltage controlled oscillator which sweeps over a range of frequencies. The identification portion resonates at certain frequencies determined by a variable reactance in the resonant circuit in the identifier which is responsive to bits from a sequential data register. The bits result in the on-and-off switching of the variable reactance which modifies the resonant frequency in the identification portion or modifies the frequency of an oscillator in the identification portion. The changes and sequence of changes in the resonant frequency are detected and recorded by the recognition portion such that the internal code of the identifier is determined.

109 citations


Journal ArticleDOI
01 Dec 1981
TL;DR: A new high-frequency monolithic voltage-controlled oscillator (VCO) is described that achieves /spl plusmn/60 ppm//spl deg/C temperature coefficient of frequency over 0-75/spl deg-C at center frequencies from DC to 20 MHz.
Abstract: A new high-frequency monolithic voltage-controlled oscillator (VCO) is described that achieves /spl plusmn/60 ppm//spl deg/C temperature coefficient of frequency over 0-75/spl deg/C at center frequencies from DC to 20 MHz. The circuit also exhibits good linearity of voltage to frequency, and excellent triangle output waveform over the whole frequency range from low frequencies to 20 MHz. The circuit is fabricated using an eight mask IC process and has a die size of 65/spl times/50 mils/SUP 2/.

60 citations


Journal ArticleDOI
TL;DR: Although the SC oscillator is practical only when its oscillating frequency is less than about 1/25 the clock frequency, it is useful in a number of low frequency applications, especially when stability is important.
Abstract: A new switched-capacitor (SC) oscillator is described. The oscillator is easily modified to be either voltage controlled or digitally programmed. Although the oscillator is practical only when its oscillating frequency is less than about 1/25 the clock frequency (because of the excess phase jitter that develops at higher ratios), it is useful in a number of low frequency applications, especially when stability is important.

57 citations


Journal ArticleDOI
TL;DR: In this paper, optical heterodyne detection using an independently temperature stabilized semiconductor laser local oscillator and a square-law detector followed by electrical frequency discrimination circuitry is demonstrated. And the intermediate frequency fluctuation is reduced to less than 5 MHz by employing a feedback of the RF frequency discriminator output to the laser injection current.
Abstract: Frequency modulated semiconductor laser signals are demodulated by optical heterodyne detection using an independently temperature stabilized semiconductor laser local oscillator and a square-law detector followed by electrical frequency discrimination circuitry. Short-term and long-term beat frequency stability of the free-running laser transmitter and the local oscillator are delineated. Direct frequency modulation characteristics of the laser transmitter are studied by observing the intermediate frequency spectra. Frequency modulation-demodulation of pulse pattern signals at 100-200 Mbit/s is demonstrated. Reduction of the intermediate frequency fluctuation to less than 5 MHz is realized by employing a feedback of the RF frequency discriminator output to the local oscillator injection current.

55 citations


Patent
23 Oct 1981
TL;DR: In this paper, the phase-locked loop section of the synthesizer is periodically disconnected from the battery supplied power by means of a switch, and means (22, 24) are provided for maintaining a control signal on the VCO associated with the loop.
Abstract: The phase-locked loop section (10, 14) of the synthesizer is periodically disconnected from the battery supplied power by means of a switch (60). In order to prevent substantial drift of the phase-locked loop during such power interruption, means (22, 24) are provided for maintaining a control signal on the VCO (12) associated with the loop (10) that maintains the VCO frequency. By minimizing the frequency drift, the loop can be re-locked in a short period of time following each power interruption.

52 citations


Journal ArticleDOI
TL;DR: In this paper, the optical frequency spectra of a directly frequency modulated AlGaAs semiconductor laser in the 0?5.2 GHz range were measured by using a Fabry-Perot interferometer and a birefringent optical filter.
Abstract: Optical frequency spectra of directly frequency modulated AlGaAs semiconductor laser in the 0?5.2 GHz range were measured by using a Fabry-Perot interferometer and a birefringent optical filter. The frequency deviation is linearly proportional to the RF modulation current. The measured modulation frequency characteristics for the frequency deviation show that the thermal effect is predominant in the frequency below 10 MHz. It has a resonance peak which behaves just like the peak observed in the modulation. Experimental results agreed well with theoretical values calculated by considering thermal effect and carrier-dependent refractive index variation.

41 citations


Patent
23 Mar 1981
TL;DR: A cable television up-down tuner includes a first frequency up conversion stage in which a first local oscillator, tunable over a wide frequency range, is coupled to a ring diode mixer having individual biasing networks in series with each diode as discussed by the authors.
Abstract: A cable television up-down tuner includes a first frequency up conversion stage in which a first local oscillator, tunable over a wide frequency range, is coupled to a ring diode mixer having individual biasing networks in series with each diode A combination high pass and low pass filter provides a bandwidth coupling of input signals to the mixer An intermediate frequency amplifier couples the up converted signal to a second mixer A fixed tuned second local oscillator down converts the intermediate frequency signal to a selected television channel frequency The first local oscillator includes a printed circuit board transmission line resonator which is tuned by a varactor diode The two local oscillators are positioned adjacent the corners of a quadrilateral housing and are isolated from each other by three wall-type shields

41 citations


Patent
30 Oct 1981
TL;DR: In this article, an initialization loop is designed to pull the frequency of the output signal very close to the reference signal, thus assuring the locking of the primary loop, and a switch selectively connects components of the initialization loop to the integrator when the frequency difference between the reference signals and the output signals is small.
Abstract: An integrator and a voltage controlled oscillator produce a variable frequency output signal. A primary loop is locked to an input signal and has a narrow bandwidth allowing the output signal to precisely track the input signal. An initialization loop is locked to an internally generated reference signal and has a wide bandwidth for pulling the frequency of the output signal very close to the frequency of the reference signal. Since the frequency of the reference signal is approximately equal to the frequency of the input signal the initialization loop pulls the frequency of the output signal very close to the frequency of the input signal thus assuring locking of the primary loop. A switch selectively connects components of the primary loop to the integrator when the frequency difference between the reference signal and the output signal is small and connects components of the initialization loop to the integrator when the frequency difference between the reference signal and the output signal is large.

40 citations


Patent
09 Jan 1981
TL;DR: In this paper, an improved frequency synthesizer utilizes a first order loop and sample-and-hold phase detector with optimized gain to obtain very fast frequency locking characteristics, and synchronization of the programming of the loop divider and of the range shifting the voltage controlled oscillator is also utilized.
Abstract: An improved frequency synthesizer utilizes a first order loop and sample-and-hold phase detector (20) with optimized gain to obtain very fast frequency locking characteristics. In addition, synchronization of the programming of the loop divider (34) and of the range shifting the voltage controlled oscillator (30) is also utilized. An adaptive loop filter (100) is provided to allow a first order loop to be used for lock acquisition and still maintain excellent noise performance after lock has been obtained.

39 citations


Patent
26 Jun 1981
TL;DR: In this article, a programmable phase-locked loop frequency synthesizer with a feedback path that includes a tuned discriminator circuit is frequency modulated by coupling a portion of the modulating signal into the feedback path to effect modulation at rates which exceed the bandwidth of the phaselocked loop.
Abstract: A programmable phase-locked loop frequency synthesizer having a feedback path that includes a tuned discriminator circuit is frequency modulated by coupling a portion of the modulating signal into the feedback path to effect modulation at rates which exceed the bandwidth of the phase-locked loop and by utilizing a portion of the modulating signal to frequency modulate the phase-locked loop reference signal to effect modulation at rates within the bandwidth of the phase-locked loop. A digitally controlled phase shifter that forms a portion of the discriminator tuning circuits in effect divides the phase-locked loop tuning range into a series of relatively narrow centiguous frequency bands. Data, representing deviations in the discriminator characteristics for each of these frequency bands, are stored in an erasable programmable read only memory. As the phase-locked loop is tuned to a particular frequency, a microprocessor determines the associated frequency band, accesses the stored data appropriate to that frequency band and establishes the proper setting of the digitally controlled phase shifter. The accessed data is coupled to a multiplying digital to analog convertor to automatically adjust the level of the modulating signal so that the system exhibits relatively constant modulation characteristics for each frequency band within the tuning range of the phase-locked loop. Low distortion is achieved within each of the relatively narrow frequency bands by circuitry which reduces or eliminates amplitude variations within the feedback path that includes the discriminator circuit, band pass filtering within this feedback path, and a feed-forward circuit arrangement that prevents modulation components from adversely affecting the discriminator tuning circuits. Additionally, a gain switching arrangement that automatically reduces the gain of the feedback loop and the phase-locked loop gain ensures system stability for all operating and tuning conditions.

38 citations


Patent
26 Jun 1981
TL;DR: In this article, a programmable divide-by-N phase-locked loop frequency synthesizer is described, where the feedback path includes a second phaselocked loop that serves as a tracking filter.
Abstract: A phase-locked loop is disclosed that exhibits flat modulation characteristics over a wide range of carrier frequencies for either frequency or phase modulation at rates that are both within and outside the loop bandwidth. The disclosed arrangement is a programmable divide-by-N phase-locked loop frequency synthesizer wherein the feedback path includes a second phase-locked loop that serves as a tracking filter 20. Modulation is supplied to the main phase-locked loop via a first modulation path that couples the modulating signal to the frequency control terminal 50 of the phase-locked loop voltage-controlled oscillator 12 and via a second modulation path that couples the modulating signal to the phase-locked loop phase detector 22. To configure the system so that flat modulation is attained. the gain factors of the first and second modulation paths are established in accordance with specific relationships and the second modulation path includes a compensator network 44 having a transfer function that at least approximates that of the phase-locked loop 20 which is embedded in the system feedback path. Additionally, the modulation signal coupled to both modulation paths is adjusted on the basis of carrier frequency to compensate for frequency-related variation in the transfer characteristics of the main loop VCO. The transfer characteristic of the main loop phase detector 22 is controlled to maintain a constant loop bandwidth.

Patent
Nobukazu Hosoya1
11 Sep 1981
TL;DR: In this paper, a horizontal synchronizing circuit for use in a television receiver set comprises a horizontal AFC circuit so designed that an output from a voltage controlled oscillator oscillating at a frequency higher than a horizontal frequency is frequency-divided to provide a frequency divided output which is then compared in phase with a horizontal synchronized signal, the oscillating frequency of the oscillator being controlled by a signal indicative of the result of such comparison.
Abstract: A horizontal synchronizing circuit for use in a television receiver set comprises a horizontal AFC circuit so designed that an output from a voltage controlled oscillator oscillating at a frequency higher than a horizontal frequency is frequency-divided to provide a frequency-divided output which is then compared in phase with a horizontal synchronizing signal, the oscillating frequency of the oscillator being controlled by a signal indicative of the result of such comparison, and a horizontal APC circuit for driving a horizontal deflection circuit in response to the phase controlled, frequency-divided output. Various pulses for control and gating functions are synthesized by combining outputs of different frequencies from a frequency divider.

Patent
06 Apr 1981
TL;DR: In this paper, the voltage converter has its input connected to the output of a first reference divider in the variable-reference divider (÷M) and its output connected to a control input (varactor diode) of the voltage controlled oscillator.
Abstract: In a frequency synthesizer phase locked loop including a reference oscillator, a variable reference divider (÷M), a sample and hold phase detector, a loop filter, a voltage controlled oscillator and a variable divider (÷N), a voltage converter for controlling the voltage of a control input to the voltage controlled oscillator is disclosed In the preferred embodiment, the voltage converter has its input connected to the output of a first reference divider in the variable reference divider (÷M) and its output connected to a control input (varactor diode) of the voltage controlled oscillator The voltage converter clamps the divider reference signal from the first reference divider and provides a negative voltage level output to bias the varactor diode of the voltage controlled oscillator Thus, the tuning range of the frequency synthesizer is increased

Patent
05 Jun 1981
TL;DR: In this paper, the clock signal required for demodulation of a received NRZ digital data stream is generated by detecting each transition across a reference axis made by the received NN digital data streams, which is then utilized to change the voltage applied to a voltage controlled oscillator.
Abstract: The clock signal required for demodulation of a received NRZ digital data stream is generated by detecting each transition across a reference axis made by the received NRZ digital data stream. This transition data is then utilized to change the voltage applied to a voltage controlled oscillator. The change in the voltage applied to the voltage controlled oscillator causes the frequency of the output from the voltage controlled oscillator to change. The change in the frequency of the output of the voltage controlled oscillator adjusts the period of the clock signal until the clock signal is synchronized with the transition data at which time it may be used to demodulate the recieved NRZ digital data.

Patent
10 Jul 1981
TL;DR: In this paper, a frequency/phase locked loop for providing signals which are frequency and phase locked to signals at a reference frequency from a reference oscillator which is determinative of the frequency stability includes a frequency-controlled generator of a lower frequency stability.
Abstract: A frequency/phase locked loop for providing signals which are frequency and phase locked to signals at a reference frequency from a reference oscillator which is determinative of the frequency stability includes a frequency-controlled generator of a lower frequency stability. The frequency controlled generator is responsive to control signals for switching between first and second frequencies which are substantially higher than the reference frequency. The second frequency is approximately one to ten percent higher than the first frequency. The frequency divider coupled to the frequency generator provides an output signal at the same frequency as the reference oscillator. A digital phase comparator compares the outputs of the frequency divider with the reference signals. A digital integrating stage coupled to the comparator provides the control signals such that during a first portion of a period of the reference signals the first frequency is selected and during a second portion of the period the second frequency is selected.


Patent
23 Apr 1981
TL;DR: In this paper, the phase detector consists of a binary counter whose most significant bit (MSB) is defined to be the recovered clock and the desired data transition points are defined as coinciding with the falling edge of the counter's MSB.
Abstract: A partly analog partly digital bit synchronizer capable of acquisition and operation over an arbitrarily broad range of data rates is disclosed. A second order phase lock loop (PLL) is employed providing both phase and frequency correction to a voltage controlled oscillator (VCO). The phase detector consists of a binary counter whose most significant bit (MSB) is defined to be the recovered clock. The desired data transition points are defined as coinciding with the falling edge of the counter's MSB. At each data transition, the least significant bits within the counter are used to set the duration of phase and frequency correction pulses proportional to the phase error, which pulses are then fed to the VCO. An acquisition circuit diverts the frequency correction pulses in order to sweep the VCO within a selected half octave. Lock is recognized when a preselected number of data transitions with phase error below a preset maximum occur consecutively. An autorange capability automatically steps the frequency through half octaves within an arbitrarily large range.

Patent
10 Dec 1981
TL;DR: In this paper, a circuit for processing the vortex shedding frequency signal of a vortex shedding flowmeter comprises a phase detector, switch and low pass filter connected in series, and a voltage controlled oscillator is connected between an output of the low-pass filter and an input of the phase detector.
Abstract: A circuit for processing the vortex shedding frequency signal of a vortex shedding flowmeter comprises a phase detector, switch and low pass filter connected in series. The phase detector receives the vortex shedding frequency and applies it over the normally closed switch to the low pass filter which produces an analog signal corresponding to the frequency of the vortex shedding frequency signal. A voltage controlled oscillator is connected between an output of the low pass filter and an input of the phase detector for tracking the vortex shedding frequency and producing a tracking frequency signal which is maintained when the vortex shedding frequency signal disappears. A range or gain code circuit portion is connected for establishing a set time period during which the frequency signal is accumulated in a counter. The accumulated signal from the counter is utilized as a digital signal corresponding to the vortex shedding frequency signal.

Patent
18 Dec 1981
TL;DR: A sound responsive variable visual display (light organ) including an array 25 of light-emitting diodes arranged along a pair of orthogonal axes is described in this article.
Abstract: A sound responsive variable visual display (light organ) including an array 25 of light-emitting diodes arranged along a pair of orthogonal axes. A pair of counters (58, 60) having decoded outputs (30, 35) forming common connection points of the anodes and cathodes, each connection point corresponding to one point on one of the orthogonal axes, to activate one diode at a time. The counters are driven by independent voltage controlled oscillators (49, 50) with independent quiescent frequency adjustments (51, 52). The control voltage (38) is an electrical analog of an audio sound field in which the device is placed as detected by a microphone (12). Also shown are alternate arrangements for reversing the direction of indexing of the elements in the array along the axes, one to reverse counter direction in response to reaching predetermined high and low counts (71) and an alternate apparatus (48, 79) including a voltage controlled oscillator (48) for switching between an up and down counting direction.

Patent
06 Apr 1981
TL;DR: In this article, a sample and hold phase detector for a phase locked loop includes a digital detector for detecting the frequency and phase difference between the reference signal and the voltage controlled oscillator (VCO).
Abstract: A sample and hold phase detector for a phase locked loop includes a digital detector for detecting the frequency and phase difference between the reference signal and the voltage controlled oscillator (VCO) signal. In a first mode of operation, the digital detector generates a first signal relating the difference in frequency and in a second mode of operation generates a second signal relating the difference in phase. A capacitor stores the first or second signal depending on the operational mode of the digital detector. The capacitor is selectively discharged in response to a discharge signal produced by the digital detector when either the VCO frequency is higher than the reference frequency or following each detection of a phase difference. A first amplifier is used to bypass a portion of the loop filter to effect rapid changes in VCO frequency in the first mode while a second amplifier couples the control voltage to the VCO via the loop filter to maintain proper VCO frequency in the second mode.

Patent
02 Jun 1981
TL;DR: In this paper, an automatic frequency control loop can be incorporated to control the frequency of a voltage controlled oscillator, whose output is defined to be f = f o + kV.
Abstract: A device for converting a signal voltage into a multi-bit digital word thatefines the voltage magnitude and polarity. The input voltage V to be digitized is used to control the frequency of a voltage controlled oscillator, whose output is defined to be f=f o +kV. The signal out of the voltage controlled oscillator is fed to differential delay line filters that permit all digits to be derived in parallel. The filters comprise pairs of delay lines of unequal length, each pair feeding a respective phase detector whose output is amplified, and diode-rectified and limited. To increase the accuracy of this device, an automatic frequency control loop can be incorporated to control f o . This loop zeros V occasionally and reads the output digital word to measure the frequency error and add a correcting voltage to the input voltage V when it is not zeroed for the measurement.

Patent
23 Apr 1981
TL;DR: In this paper, a bit synchronizer capable of operation over all frequencies, limited only by the speed of the integrated circuits and other components, is presented, where a programmable scaling circuit allows the operator to select the desired half octave range of operation.
Abstract: A bit synchronizer capable of operation over all frequencies, limited only by the speed of the integrated circuits and other components. The input data can be any random antipodal data. A programmable scaling circuit allows the operator to select the desired half octave range of operation. Half octaves can be scanned automatically by the autorange feature of the invention. An acquisition circuit sweeps over the selected half octave, diverting frequency correction pulses in order to sweep a voltage controlled oscillator (VCO). Lock is recognized when a preselected number of data transitions with phase error below a preset maximum occur consecutively. A second order phase lock loop (PLL) provides both phase and frequency correction.

Patent
17 Feb 1981
TL;DR: In this article, a transmission system for transmitting signals over an electrical power distribution circuit comprises a transmitter arranged to produce at least two carrier signals of different frequency and to modulate each of them with the same digital signal.
Abstract: A transmission system, for transmitting signals over an electrical power distribution circuit, comprises a transmitter arranged to produce at least two carrier signals of different frequency and to modulate each of them with the same digital signal. The respective frequencies of the carrier signals are derived by frequency division from a common master oscillator, and are thus phase-coherent. The system includes a receiver for receiving the signals, comprising a respective input circuit for each modulated carrier, the input circuits each being tuned to the frequency of their respective carrier signal. A plurality of oscillator signals of different frequencies, derived from a variable frequency oscillator, are used to beat the received carrier signals to respective signals at a common frequency, which signals are summed. The summed signal at the common frequency is applied to one input of a phase detector, whose other input is connected to receive another oscillator signal, also at the common frequency, from the variable frequency oscillator. The output signal from the phase detector is applied to the variable frequency oscillator to lock its frequency to those of all the carriers and therefore to that of the master oscillator in the transmitter. The digital signal is derived from the output of the phase detector by digital correlation techniques.

Patent
08 Oct 1981
TL;DR: In this article, a single Doppler velocimeter for measuring blood flow is presented, where the frequency of insonation is chosen according to the site and size of a vessel to be investigated.
Abstract: In an ultrasonic Doppler velocimeter for measuring blood flow it is necessary to change the frequency of insonation according to the site and size of a vessel to be investigated. Several different crystal pairs are employed in a single probe, each pair associated with a different frequency. All of the transmitting crystals are connected in parallel, and all of the receiving crystals are connected in parallel. As a result, the single probe is suitable for investigating blood flow in different blood vessel conditions. Optimum insonation frequency selection is achieved by use of a voltage controlled oscillator, and a frequency control circuit which compares powers received at different frequencies. Signals representative of blood velocities appear at the output of a scaler which ensures that the same velocity provides the same output independently of frequency of insonation.

Patent
Mark Gregory Call1
16 Nov 1981
TL;DR: In this article, a voltage-controlled oscillator (VCO) comprises a current controlled oscillator and control circuitry which independently adjusts the gain (K v ) and free run or center frequency of the VCO.
Abstract: A voltage-controlled oscillator (VCO) comprises a current controlled oscillator (ICO) and control circuitry which independently adjusts the gain (K v ) and free-run or center frequency of the VCO. The control circuitry includes a first current source selected to set the free-run frequency of the VCO and a second current source selected to set the gain (K v ) of the VCO. The current sources are coupled to a common node in a summing/difference configuration. The controlled current generated from the summing/difference configuration is delivered into the ICO. Independent current mirrors are utilized to supply controlled current into the node of the summing/difference configuration.

Patent
31 Mar 1981
TL;DR: In this article, an exceptionally wideband, synthesizer controlled voltage controlled oscillator is disclosed which is characterized by a plurality of pin diode frequency shift networks which, when actuated, shifts the frequency of the oscillator in selectable binary steps within a wide frequency range in the order of 48 MHz.
Abstract: An exceptionally wideband, synthesizer controlled voltage controlled oscillator is disclosed which is characterized by a plurality of pin diode frequency shift networks which, when actuated shifts the frequency of the oscillator in selectable binary steps within a wide frequency range in the order of 48 MHz. Special means are included to prevent undesireable parasitic oscillation modes when such frequency shift networks are in an inactuated, switched off mode. A multiple varactor tuning circuit is provided for selecting a precise frequency within a relatively narrow frequency band on the order of 6 MHz.

Patent
22 Jan 1981
TL;DR: In this article, a radio receiver comprises a phase-locked loop and an automatic frequency control loop which are selectively coupled with a voltage-controlled local oscillator to control a local frequency.
Abstract: A radio receiver comprises a phase locked loop and an automatic frequency control loop which are selectively coupled with a voltage-controlled local oscillator to control a local oscillator frequency. The phase locked loop and the automatic frequency control loop have a common loop filter which supplies the voltage-controlled oscillator with a control voltage. The loop filter is arranged so that its time constant may be switched from a small value to a great value in response to switching of the operation mode of the voltage-controlled oscillator from a phase locked loop control mode for the selection of broadcasting station to an automatic frequency control loop control mode for the maintenance of the local oscillator frequency after tuning of the radio receiver. The radio receiver can be arranged so that the local oscillator frequency may be maintained by the phase locked loop after the tuning of the receiver to a weak broadcast signal when muting control is rendered ineffective by a muting switch.

Patent
05 Jan 1981
TL;DR: In this article, the oscillation frequency of the reference oscillator is calculated by a counter and the coarse frequency is divided by the count value and then an integer value is obtained by rounding off the divided result.
Abstract: The apparatus of the present invention is provided with a reference oscillator having an oscillation frequency lower than the oscillation frequency of a voltage controlled oscillator to be measured. Either reference oscillator or the oscillator to be measured is controlled by a phase lock loop so that a difference between a frequency N times the oscillation frequency of the reference oscillator and the oscillation frequency of the voltage controlled oscillator may assume a predetermined value. A coarse oscillation frequency of the voltage controlled oscillator is obtained from its control voltage. The oscillation frequency of the reference oscillator is counted by a counter and the coarse frequency is divided by the count value and then an integer value is obtained by rounding off the divided result. The count value of the counter is multiplied by the divided result to obtain a highly accurate oscillation frequency value for the voltage controlled oscillator with high accuracy.

Patent
19 Oct 1981
TL;DR: In this article, the VCO is incorporated in a phase-lock loop (PLL) that is capable of locking to a multiple of a reference frequency oscillator over a range of multiples.
Abstract: A vehicle detector installation includes a loop oscillator the loop of which is laid in the roadway and which is locked in operation to a voltage controlled oscillator (VCO). Vehicle detection is effected by a phase detector monitoring the phase difference between the oscillators. The VCO is incorporated in a phase-lock loop (PLL) that is capable of locking to a multiple of a reference frequency oscillator over a range of multiples. To achieve the locking of the loop oscillator to the VCO, means are provided for disabling the normal operation of the PLL and sweeping the VCO over its range of frequency until the phase detector indicates that the loop oscillator and VCO frequencies are equal. This indication activates the PLL to its normal operation to pull the VCO and therewith the loop oscillator to an adjacent multiple of the reference frequency. The PLL is maintained by a repeated charge/discharge cycle of the VCO capacitor that is dependent on the phase of the reference oscillator and the VCO.

Patent
23 Apr 1981
TL;DR: In this paper, a combined phase-locked loop frequency demodulator and frequency synthesizer for frequency-modulated wave receivers using two phaselocked loops respectively for synthesis and for demodulation is presented.
Abstract: A combined phase-locked loop frequency demodulator and frequency synthesizer for frequency-modulated wave receivers using two phase-locked loops respectively for synthesis and for demodulation In this device, the frequency-modulated signal is applied to one of the inputs of a first phase comparator whose other input is coupled to the output of a voltage-controlled oscillator, which output is also coupled, through a prescaler and a programmable frequency divider mounted in cascade, to one of the inputs of a second phase and frequency comparator whose other input is coupled to the output of a crystal-controlled reference oscillator The output of the first comparator is coupled by means of a first low-pass or bandpass filter to a first input of an analog adder whose second input is coupled by means of a second low-pass filter, having a relatively low upper cut-off frequency, to the output of the second comparator The output of the adder which combines the signals from the two filters is connected to the frequency-control input of the voltage-controlled oscillator The output of the first filter supplies the demodulated signal and thus constitutes the output of the frequency demodulator, whose phase-locked loop is combined with the phase-locked loop of the frequency synthesizer, which selects the frequency of the modulated carrier wave, by means of the adder and the single voltage-controlled oscillator which are the common elements of both phase-locked loops