Voltage-controlled oscillator

About: Voltage-controlled oscillator is a research topic. Over the lifetime, 23896 publications have been published within this topic receiving 231875 citations. The topic is also known as: VCO.

Modeling, design and characterization of a new low jitter analog dual tuning LC-VCO PLL architecture

Abstract: This paper describes the modeling, design, and characterization of a low-jitter 2.4-GHz LC-VCO PLL architecture realized in a standard 0.12-/spl mu/m CMOS technology. It features an analog dual control loop for fine and coarse VCO tuning that allows very low VCO gain (60 MHz/V) for noise rejection while maintaining a wide tuning range. The coarse input of the VCO is driven by an analog circuit that adjusts the VCO gain in a continuous manner. Measurements demonstrate an integrated jitter of 0.74 ps that is 43% lower compared to results from a standard PLL topology (STD PLL) with a single control loop. The PLLs have the same bandwidth and output frequency range and were built on the same wafer for comparison. The circuit area of the proposed LC-VCO PLL is 0.7 mm/sup 2/ and the power consumption is 32 mW. The area and power consumption of the proposed LC-VCO PLL are less than 1% larger compared to the STD PLL.

Precision frequency and phase synthesis

Abstract: An electronic system, such as a video decoder ( 80 ), includes a clock generator circuit ( 22, 22′ ) based upon a phase-locked loop (PLL) ( 25 ). The PLL ( 25 ) includes a voltage controlled oscillator (VCO) ( 30 ) that produces a plurality of evenly-spaced output phases, each of a locked frequency relative to a reference clock (CREF). A frequency synthesis circuit ( 27 ) receives a frequency selection value on control lines (FREQ) that include an integer and a fraction portion. The integer and fraction portion of the frequency selection value are added to the current contents of a register ( 40 ) that stores the previous integer value used to select the corresponding phase from VCO ( 30 ) for application to the clock input of a toggle flip-flop ( 36 ) from which the output clock (COUT) is generated. Use of the fraction portion permits a time-averaged clock frequency to be produced with more precision than the multiple phases output by the VCO ( 30 ). Alternative embodiments include multiple frequency synthesis circuits ( 27 ) based upon the same PLL ( 25 ), and the generation of a phase-shifted secondary output from a phase synthesis circuit ( 29 ) that is slaved to the frequency synthesis circuit ( 27 ). Additional performance is obtained by providing separate paths ( 52 a , 52 b ) for producing the leading and trailing edges of the output clock (COUT).

A Fast and High-Precision VCO Frequency Calibration Technique for Wideband $\Delta \Sigma $ Fractional-N Frequency Synthesizers

Abstract: A VCO frequency calibration technique suitable for a wideband fractional-N PLL is presented. It provides a fast and high-precision search for an optimal discrete tuning curve of an LC VCO during the coarse tuning process in a fractional-N PLL. A high-speed frequency error detector (FED) converts the VCO frequency to a digital value and computes the exact frequency difference from a target frequency. A minimum error code finder finds an optimal code that is closest to the target frequency. Due to the pure digital domain operation, a ΔΣ modulator in PLL can be deactivated during the calibration process, which makes this technique fast and accurate especially for a ΔΣ fractional-N PLL. We achieve a single-bit calibration time of only kTREF for obtaining a frequency resolution of fREF/k, and compared to the conventional techniques, which is the best performance in terms of the calibration time versus resolution. Such fast VCO frequency calibration can greatly reduce the total lock time in a PLL. A 2.3-3.9 GHz fractional-N PLL employing the proposed calibration technique is implemented in 0.13 μm CMOS. Successful operation is verified through experimental results. The measured calibration time for a 6-bit capbank is 1.09 and 2.03 μs for a frequency resolution of 19.2 and 4.8 MHz, respectively.

Automatic pretuning of a voltage controlled oscillator in a frequency synthesizer using successive approximation

Abstract: The automatic pretuning of a voltage controlled oscillator in a phase locked loop frequency synthesizer utilizes a successive approximation technique to rapidly bring the coarse tuning voltage of the oscillator to the desired pretuning value. A digital number stored in a digital register is converted to an analog voltage value and applied to the voltage controlled oscillator as the coarse tuning voltage. The frequency of the output signal from the oscillator is compared with a reference signal, and control logic responsive to the sense of the frequency difference between the reference signal and the oscillator output signal adjusts the value of the number stored in the digital register successively from the most significant bit to the least significant bit. A microprocessor can be used to adjust the value of the number stored in the register, as well as provide additional functions such as reverse successive approximation when the synthesizer is switched from one frequency to another frequency. The microprocessor can also be used to sweep the coarse tuning voltage of the oscillator until the output signal is within the capture range of the phase locked loop, and thereafter perform a successive approximation function to bring the coarse tuning voltage to the center of the capture range.

Continuously tuneable frequency steerable frequency synthesizer having frequency lock for precision synthesis

Abstract: A frequency locked loop frequency synthesizer is comprised of a loop including a voltage controlled oscillator, a phase lock locked loop frequency detector, a divide by N counter and a low pass loop filter. A steering voltage is applied to the loop filter to produce a desired frequency or frequencies. The frequency lock loop frequency synthesizer drives the voltage controlled oscillator frequency to be N times the reference frequency. The frequency lock loop synthesizer inherently has 90 degrees less loop phase shift than a conventional phase lock loop. Additionally, the frequency lock loop frequency synthesizer provides a highly accurate, continuously tuneable, frequency synthesizer that includes a linear frequency detector in the frequency lock loop.