Voltage-controlled oscillator

About: Voltage-controlled oscillator is a research topic. Over the lifetime, 23896 publications have been published within this topic receiving 231875 citations. The topic is also known as: VCO.

A low phase noise silicon 9 GHz VCO and an 18 GHz push-push oscillator

Abstract: The design and measurement of a Voltage Controlled Oscillator (VCO) at 9 GHz and a push-push oscillator at 18 GHz are described in this paper. Both oscillators use a packaged silicon transistor (Siemens BFP 540 F). The microstrip resonator is tuned with a GaAs varactor diode (M/A-COM ML46580). A 270 MHz tuning range is obtained with an output power varying from 3.2 to 8.7 dBm. The phase noise is below -109 dBc/Hz at 100 kHz offset and below -129 dBc/Hz at 1 MHz over the whole tuning bandwidth. The push-push oscillator shows a phase noise of -108 dBc/Hz at 100 kHz and below -124 dBc/Hz at 1 MHz from the carrier. These are, to our knowledge, one of the best phase noise from a silicon fixed or voltage-controlled oscillators using a packaged device at X to K-band frequencies.

A 90 GHz Hybrid Switching Pulsed-Transmitter for Medical Imaging

Abstract: This paper reports a fully integrated 90 GHz-carrier pulsed transmitter in 0.13 μm SiGe BiCMOS process for imaging applications. To obtain ultra-short programmable pulses, the transmitter employs a number of novel techniques including hybrid switching and Antentronics. The transmit path includes a quadrature VCO, PA driver, PA and the on-chip folded slot antenna. High speed ECL circuits generate and provide the short pulses in several operating modes. The transmitter achieves a record pulsewidth of 26 ps in the hybrid mode and 33 ps in the independent mode. This translates to >30 GHz of RF BW in the transmitter.

A 1-V 9.7-mW CMOS Frequency Synthesizer for IEEE 802.11a Transceivers

Abstract: A 1-V CMOS frequency synthesizer is proposed for wireless local area network 802.11a transceivers using a novel transformer-feedback voltage-controlled oscillator (VCO) for low voltage and a stacked frequency divider for low power. Implemented in a 0.18-mum CMOS process and operated at 1-V supply, the VCO measures a phase noise of -140.5 dBc at an offset of 20 MHz with a center frequency of 4.26 GHz and a power consumption of 5.17 mW. Its tuning range is as wide as 920 MHz (23%). By integrating the VCO into a frequency synthesizer, a phase noise of -140.1 dBc/Hz at an offset of 20 MHz is measured at a center frequency of 4.26 GHz. Its output frequency can be changed from 4.112 to 4.352 GHz by switching the 3-bit modulus of the programmable divider. The synthesizer consumes only 9.7 mW and occupies a chip area of 1.28 mm2.

K- and Q-bands CMOS frequency sources with X-band quadrature VCO

Abstract: Fully integrated 10-, 20-, and 40-GHz frequency sources are presented, which are implemented with a 0.18-/spl mu/m CMOS process. A 10-GHz quadrature voltage-controlled oscillator (QVCO) is designed to have output with a low dc level, which can be effectively followed by a frequency multiplier. The proposed multipliers generate signals of 20 and 40 GHz using the harmonics of the QVCO. To have more harmonic power, a frequency doubler with pinchoff clipping is used without any buffers or dc-level shifters. The QVCO has a low phase noise of -118.67 dBc/Hz at a 1-MHz offset frequency with a 1.8-V power supply. The transistor size effect on phase noise is investigated. The frequency doubler has a low phase noise of -111.67 dBc/Hz at a 1-MHz offset frequency is measured, which is 7 dB higher than a phase noise of the QVCO. The doubler can be tuned between 19.8-22 GHz and the output is -6.83 dBm. A fourth-order frequency multiplier, which is used to obtain 40-GHz outputs, shows a phase noise of -102.0 dBc/Hz at 1-MHz offset frequency with the output power of -18.0 dBm. A large tuning range of 39.3-43.67 GHz (10%) is observed.

An improved CMOS ring oscillator PLL with less than 4ps RMS accumulated jitter

Abstract: This paper describes a low jitter phase-locked-loop (PLL) with a 4/sup th/ order control path, and a dual control voltage ring oscillator. Near constant voltage controlled oscillator (VCO) gain over process variations, in addition to compensation for feedback ratio variation, allows improved control of the PLL bandwidth. The PLL exhibits improved noise immunity with a wide (5:1) VCO frequency range, without the need for band switching or calibration routines. This PLL is fabricated in a 0.18 /spl mu/m CMOS logic process and exhibits <4 ps rms accumulated jitter.