Voltage-controlled oscillator

About: Voltage-controlled oscillator is a research topic. Over the lifetime, 23896 publications have been published within this topic receiving 231875 citations. The topic is also known as: VCO.

Satellite positioning system receiver with reference oscillator circuit and methods therefor

Abstract: A method in a location enabled mobile wireless receiver having an oscillator, including determining a change in cellular network based frequency error of the oscillator (250), based on a difference (230) between a cellular network based frequency error of the oscillator and a reference cellular network based frequency error (210) of the oscillator, determining a first frequency error of the oscillator by summing (250) a reference satellite positioning system receiver based oscillator frequency error (220) with the change in cellular network based frequency error of the oscillator.

Analysis and Design of an Ultralow-Power CMOS Relaxation Oscillator

Abstract: This paper presents the design of a low-voltage ultralow-power relaxation oscillator without external components. The application field for this oscillator is the clock generation of low-power wake-up functions for battery-operated systems. A detailed analysis of the oscillator, including the temperature performance, is derived and verified with experimental results. The oscillator operates at a typical frequency of 3.3 kHz and consumes 11 nW from a 1-V supply at room temperature, and a temperature drift of less than 500 ppm/°C is achieved over the temperature range of -20°C to 80°C. An efficient design implementation has resulted in a cell area of 0.1 mm2 in a standard 0.35- μm digital CMOS technology.

Direct digital synthesis of precise, stable angle modulated RF signal

Abstract: An RF modulator that allows precise, stable phase shifts to be obtained. The modulator uses a PLL structure including an auxiliary feedforward path including an adaptive gain amplifier (411) used to inject a modulation signal into the PLL at a point past a loop filter (403). A phase demodulator (419) recovers from the output of the PLL phase information which is compared in a comparator (417) to the phase information of the modulation signal. A resulting error signal is used to control the gain of the adaptive gain amplifier (411). The modulator compensates for variability of the VCO (405) and other components of the PLL.

An Agile VCO Frequency Calibration Technique for a 10-GHz CMOS PLL

Abstract: This paper reports an agile VCO frequency calibration technique and its application on a 10-GHz CMOS integer-N phase-locked loop. The proposed calibration method accomplishes efficient search for an optimum VCO discrete tuning curve among a group of frequency sub-bands. The agility is attributed to a proposed frequency comparison technique which is based on measuring the period difference between two signals. Other mixed-signal circuits are also developed to facilitate this approach. The PLL incorporating the proposed calibration technique is implemented in a 0.18-mum CMOS process. The measured PLL phase noise at 10 GHz is -102 dBc/Hz at 1-MHz offset frequency and the reference spurs are lower than -48 dBc. The PLL consumes 44 mW in the low-current mode. The calibration time is less than 4mus

Transformer-Based Dual-Mode Voltage-Controlled Oscillators

Abstract: In this brief, we propose to use a transformer-based resonator to build a dual-mode oscillator, e.g., a system capable of oscillating at two different frequencies without recurring to switched inductors, switched capacitors, or varactors. The behavior of the resonator configured as a one-port and a two-port network is studied analytically, and the dependence of the quality factor on the design parameters is thoroughly explored. These results, combined with the use of traditional frequency tuning techniques, are applied to the design of a wide-band voltage-controlled oscillator (VCO) that covers the frequency range 3.6-7.8 GHz. The performance of the designed VCO, implemented in a digital 0.13-mum CMOS technology, has been studied by transistor-level and 2.5D electromagnetic simulation (Agilent Momentum). A typical phase noise performance at 1-MHz offset of -104 dBc/Hz has been predicted, while the power consumption ranges from 1 to 8 mW, depending on the VCO configuration