Voltage-controlled oscillator

About: Voltage-controlled oscillator is a research topic. Over the lifetime, 23896 publications have been published within this topic receiving 231875 citations. The topic is also known as: VCO.

A 320 MHz, 1.5 mW@1.35 V CMOS PLL for microprocessor clock generation

Abstract: This paper describes a low-power microprocessor clock generator based upon a phase-locked loop (PLL). This PLL is fully integrated onto a 2.2-million transistors microprocessor in a 0.35-/spl mu/m triple-metal CMOS process without the need for external components. It operates from a supply voltage down to 1 V at a VCO frequency of 320 MHz. The PLL power consumption is lower than 1.2 mW at 1.35 V for the same frequency. The maximum measured cycle-to-cycle jitter is /spl plusmn/150 ps with a square wave superposed to the supply voltage with a peak-to-peak amplitude of 200 mV and rise/fall time of about 30 ps. The input frequency is 3.68 MHz and the PLL internal frequency ranges from 176 MHz up to 574 MHz, which correspond to a multiplication factor of about 100.

Direct Antenna Modulation (DAM) for On-Chip mm-Wave Transceivers

Abstract: In the last few decades the puissant desire to miniaturize the digital circuits to achieve higher speed and larger density has shaped the evolution of the silicon-based technologies. This development opens a new era in the field of millimeter-wave electronics in which many low-cost high-yield silicon-based transistors can be used on a single chip to enable creation of novel architectures with unique properties not achievable with old processes. In addition to this high level of integration capability, the die size of comparable or even larger than the wave-length makes it possible to integrate antennas, transceivers, and digital circuitry all on a single silicon die. It is important to realize that although smaller parasitic capacitors and shorter transistor channels have improved fT and fmax of transistors, extremely thin metal layers, highly doped substrates, and low breakdown voltage transistors have severely affected the performance of analog and RF building blocks. For example, thin metal layers have increased the loss and lowered the quality factor of the building blocks such as capacitors and inductors and low breakdown voltage transistors have made the power generation quite challenging. Additionally, if not carefully designed, small wave-lengths in the millimeter-wave range may cause unintended radiation by on-chip components. In this dissertation, we address these issues in design of millimeter-wave silicon-based single-chip phased-array transceivers with integrated antennas. We also introduce the technique of Direct Antenna Modulation (DAM) and implement two proof-of-concept chips operating at 60 GHz. We will present the receiver and the on-chip antenna sections of a fully integrated 77 GHz four-element phased-array transceiver with on-chip antennas in silicon. The receiver section of the chip includes the complete down-conversion path comprising low-noise amplifier (LNA), frequency synthesizer, phase rotators, combining amplifiers, and on-chip dipole antennas. The signal combining is performed using a novel distributed active combining amplifier at an IF of 26 GHz. In the LO path, the output of the 52 GHz VCO is routed to different elements and can be phase shifted locally by the phase rotators. A silicon lens on the backside is used to reduce the loss due to the surface-wave power of the silicon substrate. Our measurements show a single-element LNA gain of 23 dB and a noise figure of 6.0 dB. Each of the four receive paths has a gain of 37 dB and a noise figure of 8.0 dB. Each on-chip antenna has a gain of +8 dBi. A direct antenna modulation (DAM) technique is also introduced, where the radiated far-field signal is modulated by time-varying changes in the antenna near-field electromagnetic (EM) boundary conditions. This enables the transmitter to send data in a direction-dependent fashion producing a secure communication link. The transmitter architecture makes it possible to use narrow-band highly-efficient switching power amplifiers to transmit wideband constant and non-constant envelope modulated signals. Theoretically, these systems are capable of transmitting independent data in multiple directions at full-rate concurrently using a single transmitter. Direct antenna modulation (DAM) can be performed by using either switches or varactors. Two proof-of-concept DAM transmitters operating at 60GHz using switches and varactors are demonstrated in silicon proving the feasibility of this approach.

On the design of voltage-controlled sinusoidal oscillators using OTAs

Abstract: A unified systematic approach to the design of voltage-controlled oscillators using only operational transconductance amplifiers (OTAs) and capacitors is discussed. Two classical oscillator models, i.e. quadrature and bandpass-based, are employed to generate several oscillator structures. They are very appropriate for silicon monolithic implementations. The resulting oscillation frequencies are proportional to the transconductance of the OTA, and this makes the structures well-suited for building voltage controlled oscillators (VCOs). Amplitude stabilization circuits using both automatic gain control (AGC) mechanisms and limitation schemes are presented. The circuits are compatible with the transconductance amplifier capacitor oscillator (TACO). Experimental results from bipolar breadboard and CMOS IC prototypes showing the potential of OTA-based oscillators for high-frequency VCO operation are included. >

Frequency synthesizer systems and methods for three-point modulation with a DC response

Abstract: A frequency synthesizer includes a controlled oscillator which is responsive to a frequency control input signal, to generate an output frequency. A programmable frequency divider is responsive to the output frequency and to a divider control input, to divide the output frequency by a first integral ratio or by a second integral ratio in response to the divider control input, to thereby produce a divided signal. A phase comparator is responsive to a reference frequency signal and to the divided signal, to compare the reference frequency signal and to the divided signal, and thereby produce a first error signal. A sigma deltamodulator is responsive to a modulation input to produce the divided control input. A loop filter is responsive to the first error signal, to thereby produce the frequency control input signal. Ripple compensation signals and direct modulation signals may also be provided, to provide three-point modulator for a frequency synthesizer. Analog and digital embodiments may also be provided.

Communication semiconductor integrated circuit device and a wireless communication system

Abstract: In a communication semiconductor integrated circuit device using offset PLL architectures and including an oscillator circuit and a frequency divider circuit generating an intermediate frequency signal, the oscillator circuit includes an oscillator, a programmable frequency divider which frequency-divides the oscillation signal in accordance with frequency division information, a phase comparator detecting a phase difference between an output signal of the programmable frequency divider and a reference signal, and a frequency control unit for outputting a signal indicative of the phase difference and controlling the oscillation frequency of the oscillator, wherein a frequency division ratio generator circuit generates an integer part I and a fraction part F/G based on band information concerning the use frequency band and mode information along with channel information and for producing the frequency division ratio information to thereby give it to the programmable frequency divider.