Voltage-controlled oscillator

About: Voltage-controlled oscillator is a research topic. Over the lifetime, 23896 publications have been published within this topic receiving 231875 citations. The topic is also known as: VCO.

A 300-GHz Fundamental Oscillator in 65-nm CMOS Technology

Abstract: Fundamental oscillators prove the existence of gain at high frequencies, revealing the speed limitations of other circuits in a given technology. This paper presents an oscillator topology that employs feedback from an output stage to the core, thus achieving a high speed. The behavior of the proposed oscillator is formulated and simulations are used to compare it with the conventional cross-coupled pair circuit. Three prototypes realized in 65-nm CMOS technology operate at 205 GHz, 240 GHz, and 300 GHz, each drawing 3.7 mW from a 0.8-V supply.

System and method for frequency management in a communications device having a positioning feature

Abstract: A frequency management scheme for a hybrid cellular/GPS or other device generates a local clock signal for the communications portion of the device, using a crystal oscillator or other part. The oscillator output may be corrected by way of an automatic frequency control (AFC) circuit or software, to drive the frequency of that clock signal to a higher accuracy. Besides being delivered to the cellular or other communications portion of the hybrid device, the compensated clock signal may also be delivered to a comparator to measure the offset between the cellular oscillator and the GPS oscillator. The error in the cellular oscillator may be measured from the AFC operation in the cellular portion of the device. An undershoot or overshoot in the delta between the two oscillators may thus be deduced to be due to bias in the GPS oscillator, whose value may then be determined. That value may then be used to adjust Doppler search, bandwidth or other GPS receiver characteristics to achieve better time to first fix or other performance characteristics.

Switched resonators and their applications in a dual-band monolithic CMOS LC-tuned VCO

Abstract: A switched resonator concept, which can be used to reduce the size of multiple-band RF systems and which allows better tradeoff between phase noise and power consumption, is demonstrated using a dual-band voltage-controlled oscillator (VCO) in a 0.18-/spl mu/m CMOS process. To maximize Q of the switched resonator when the switch is on, the mutual inductance between the inductors should be kept low and the switch transistor size should be optimized. The Q factor of switched resonators is /spl sim/30% lower than that of a standalone inductor. The dual-band VCO operates near 900 MHz and 1.8 GHz with phase noise of -125 and -123dBc/Hz at a 600-kHz offset and 16-mW power consumption. Compared to a single-band 1.8-GHz VCO, the dual-band VCO has almost the same phase noise and power consumption, while occupying /spl sim/37% smaller area.

A 1.8-GHz self-calibrated phase-locked loop with precise I/Q matching

Abstract: This paper describes a 1.8-GHz self-calibrated phase-locked loop (PLL) implemented in 0.35-/spl mu/m CMOS technology. The PLL operates as an edge-combining type fractional-N frequency synthesizer using multiphase clock signals from a ring-type voltage-controlled oscillator (VCO). A self-calibration circuit in the PLL continuously adjusts delay mismatches among delay cells in the ring oscillator, eliminating the fractional spur commonly found in an edge-combing fractional divider due to the delay mismatches. With the calibration loop, the fractional spurs caused by the delay mismatches are reduced to -55 dBc, and the corresponding maximum phase offsets between the multiphase signals is less than 0.20. The frequency synthesizer PLL operates from 1.7 to 1.9 GHz and the closed-loop phase noise is -105 dBc/Hz at 100-kHz offset from the carrier. The overall circuit consumes 20 mA from a 3.0-V power supply.

Progress and Challenges Towards Terahertz CMOS Integrated Circuits

Abstract: Key components of systems operating at high millimeter wave and sub-millimeter wave/terahertz frequencies, a 140-GHz fundamental mode voltage controlled oscillator (VCO) in 90-nm CMOS, a 410-GHz push-push VCO with an on-chip patch antenna in 45-nm CMOS, and a 125-GHz Schottky diode frequency doubler, a 50-GHz phase-locked loop with a frequency doubled output at 100 GHz, a 180-GHz Schottky diode detector and a 700-GHz plasma wave detector in 130-nm CMOS are demonstrated. Based on these, and the performance trends of nMOS transistors and Schottky diodes fabricated in CMOS, paths to terahertz CMOS circuits and systems including key challenges that must be addressed are suggested. The terahertz CMOS is a new opportunity for the silicon integrated circuits community.