Voltage-controlled oscillator

About: Voltage-controlled oscillator is a research topic. Over the lifetime, 23896 publications have been published within this topic receiving 231875 citations. The topic is also known as: VCO.

Method and apparatus for providing coarse and fine tuning control for synthesizing high-frequency signals for wireless communications

Abstract: A method and apparatus for synthesizing high-frequency signals is disclosed that overcomes integration problem associated with prior implementations while meeting demanding phase noise and other impurity requirements. In one embodiment, a phase-locked loop (PLL) frequency synthesizer is disclosed having a voltage controlled oscillator (VCO) with a variable capacitance that includes a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance, and the continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance. In a more general terms, a frequency synthesizer is disclosed having a first variable and a second capacitance circuits and frequency control circuitry to coarsely tune the output frequency by adjusting the first control signal and to finely tune the output frequency by adjusting the second control signal.

Ultrasonic wave oscillator circuit with output meter

Abstract: An oscillation system, having a vibrator, a resonant bridge and a low resistance, oscillates at desirable frequencies by receiving an excitation signal amplified to a predetermined value by an amplifier. A detection feedback signal containing the resonant frequency of the vibrator is input to a phase shift circuit. The phase shift circuit adjusts the phase of the detection feedback signal and the excitation signal to satisfy the oscillation condition. The output signal from the phase shift circuit is input to a PLL comprised of a phase comparator, a low pass filter, an amplifier and a voltage controlled oscillator. The frequency of the output signal from the PLL follows the resonant frequency of the vibrator and is locked. Its output signal is applied to the amplifier which feeds the oscillation system. An analog multiplier circuit is fed with signals proportional to the current and voltage from the resonant bridge circuit, and outputs the product of these signals. The output of the multiplier circuit is rectified and applied to a DC meter for indicating power consumption of the vibrator.

Fast settling phase locked loop

Abstract: A phase locked loop including a switch between a phase detector output and a VCO input to open the PLL during a frequency change is provided. While the PLL is open, an analog error correction signal is generated by sampling any residual error coming from the phase detector, and generating the analog error correction signal to counter the residual error. Once analog error correction signal is available, the switch is closed and the error correction signal is added to the phase detector output and the PLL is allowed to settle to an optimized frequency.

A 10-GHz CMOS quadrature LC-VCO for multirate optical applications

Abstract: A 10-GHz quadrature LC-VCO (QVCO) fabricated in a 0.13-/spl mu/m CMOS process for 10-Gb/s multirate optical applications is described. Bimodal oscillation behavior (or phase ambiguity) inherent to quadrature LC-VCOs is analyzed theoretically and a cascode-based coupling method is proposed which effectively eliminates bimodal oscillation. Digitally controlled capacitor arrays are used in this design to extend the tuning range of the QVCO to cover multirate operations. The QVCO achieves a jitter generation of only 32 mUI/sub pp/ at 10 GHz and a phase noise of -95 dBc/Hz at 1-MHz frequency offset with only 8 mA of current consumption in the QVCO core.

Gate speed regulator dithering ring oscillator to match critical path circuit

Abstract: A computing device is disclosed comprising digital circuitry including a critical path circuit, and a gate speed regulator. A ring oscillator generates an oscillation frequency, and dither circuitry periodically adjusts a number of inverter elements in the ring oscillator in order to adjust an average propagation delay of the ring oscillator relative to a propagation delay of the critical path circuit. A comparator compares the oscillation frequency to a reference frequency to generate an error signal, and an adjustable circuit, responsive to the error signal, adjusts at least one of a supply voltage and a clocking frequency applied to the digital circuitry.