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Voltage-controlled oscillator

About: Voltage-controlled oscillator is a research topic. Over the lifetime, 23896 publications have been published within this topic receiving 231875 citations. The topic is also known as: VCO.


Papers
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Journal ArticleDOI
TL;DR: A hybrid control method combining pulse frequency modulation (PFM) and pulse width modulation is proposed to overcome the limited frequency resolution issue and improve voltage regulation performance for LLC resonant converters.
Abstract: High switching frequency is an effective method to improve power density for LLC resonant converters. However, conventional digital controllers, such as general-purpose digital signal processors and microprocessors, have limited frequency resolution, which induces high primary- and secondary-side current variation and leads to poor output voltage regulation. In this paper, a hybrid control method combining pulse frequency modulation (PFM) and pulse width modulation is proposed to overcome the limited frequency resolution issue. The proposed hybrid control method focuses on steady-state operation, and its operating principles are introduced and analyzed. In addition, the proper magnetizing inductance and dead time duration are derived to ensure that the power mosfet s achieve zero voltage switching with the proposed control method. The improved voltage regulation performance is compared with the conventional PFM control and verified through simulation and experimental results using a 240 W prototype converter operating at a switching frequency of 1 MHz.

109 citations

Journal ArticleDOI
TL;DR: A mm-wave frequency generation technique that improves its phase noise (PN) performance and power efficiency and third-harmonic boosting and extraction techniques are proposed and applied to the frequency generator.
Abstract: This paper proposes a mm-wave frequency generation technique that improves its phase noise (PN) performance and power efficiency. The main idea is that a fundamental 20 GHz signal and its sufficiently strong third harmonic at 60 GHz are generated simultaneously in a single oscillator. The desired 60 GHz local oscillator (LO) signal is delivered to the output, whereas the 20 GHz signal can be fed back for phase detection in a phase-locked loop. Third-harmonic boosting and extraction techniques are proposed and applied to the frequency generator. A prototype of the proposed frequency generator is implemented in digital 40 nm CMOS. It exhibits a PN of $-100\;\text{dBc/Hz}$ at 1 MHz offset from 57.8 GHz and provides 25% frequency tuning range (TR). The achieved figure-of-merit (FoM) is between 179 and 182 dBc/Hz.

109 citations

Journal ArticleDOI
TL;DR: In this article, two 5.35 GHz monolithic voltage-controlled oscillators and two prescalers have been fabricated in a digital 0.25/spl mu/m CMOS process.
Abstract: Two 5.35-GHz monolithic voltage-controlled oscillators (VCOs) and two prescalers have been fabricated in a digital 0.25-/spl mu/m CMOS process. One VCO uses p/sup +//n-well diodes, while the other uses MOS varactors, Q of 57 at 5.5 GHz and 0 V bias (low-Q condition) for a p/sup +//n-well varactor has been achieved. For an MOS varactor, it is possible to achieve a quality factor of 140 at 5.5 GHz. The tuning ranges of the VCOs are >310 MHz, and their phase noise is <-116.5 dBc/Hz at a 1-MHz offset while consuming /spl sim/7 mW power at V/sub DD/=1.5 V. The low phase noise is achieved by using only PMOS transistors in the VCO core and by optimizing the resonator layout. The prescalers utilize a variation of the source-coupled logic. The power consumption is 4.1 mW at 1.5-V V/sub DD/ and 5.4 GHz. By widening the transistors in the first three divide-by-two stages, the maximum operating frequency is increased to 9.96 GHz at V/sub DD/=2.5 V.

109 citations

Journal ArticleDOI
TL;DR: A CMOS system on a chip (SoC) for neuroelectrical monitoring and responsive neurostimulation is presented and is validated in vivo using epilepsy monitoring (seizure detection) and treatment ( seizure suppression) experiments.
Abstract: A 64-channel 0.13- $\mu \text{m}$ CMOS system on a chip (SoC) for neuroelectrical monitoring and responsive neurostimulation is presented. The $\Delta \Sigma $ -based neural channel records signals with rail-to-rail dc offset at the input without any area-intensive dc-removing passive components, which leads to a compact 0.013-mm2 integration area of recording and stimulation circuits. The channel consumes 630 nW, yields a signal to noise and distortion ratio of 72.2 dB, a 1.13- $\mu $ Vrms integrated input-referred noise over 0.1–500 Hz frequency range, and a noise efficiency factor of 2.86. Analog multipliers are implemented in each channel with minimum additional area cost by reusing the multi-bit current-digital to analog converter that is originally placed for current-mode stimulation. The multipliers are used for compact implementation of bandpass finite impulse response filters, as well as voltage gain scaling. A tri-core low-power DSP conducts phase-synchrony-based neurophysiological event detection and triggers a subset of 64 programmable arbitrary-waveform current-mode stimulators for subsequent neuromodulation. Two ultra-wideband (UWB) wireless transmitters communicate to receivers located at 10 cm to 2 m distance from the implanted SoC with data rates of 10–46 Mb/s, respectively. An inductive link that operates at 1.5 MHz provides power to the SoC and is also used to communicate commands to an on-chip ASK receiver. The chip occupies 6 mm2 while consuming 1.07 and 5.44 mW with delay-based and voltage controlled oscillator-based UWB transmitters, respectively. The SoC is validated in vivo using epilepsy monitoring (seizure detection) and treatment (seizure suppression) experiments.

108 citations

Proceedings ArticleDOI
05 May 1997
TL;DR: In this paper, a set of two VCOs is developed in a 0.4 /spl mu/m CMOS process, using a fully integrated spiral inductor with symmetrical octagonal shape in the resonance LC-tank.
Abstract: A set of two VCOs is developed in a 0.4 /spl mu/m CMOS process, using a fully integrated spiral inductor with symmetrical octagonal shape in the resonance LC-tank. One VCO operates at a 900 MHz center frequency, and the other at 1.8 GHz, both achieving the required phase noise spec and tuning range for the GSM and DCS-1800 system. The phase noise equals -108 dBc/Hz at 100 kHz offset for the 900 MHz version and -113 dBc/Hz at 200 kHz for the 1.8 GHz version. The power consumption is 9 and 11 mW. An eight-modulus prescaler operates together with both VCOs.

108 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023168
2022344
2021269
2020388
2019469
2018530