Voltage-controlled oscillator

About: Voltage-controlled oscillator is a research topic. Over the lifetime, 23896 publications have been published within this topic receiving 231875 citations. The topic is also known as: VCO.

An Novel L-shape Active Leakly-Wave Antenna with power combining and scanning capability

Abstract: In this paper, an active-integrated leaky-wave antenna with power combining scanning capability is presented This leaky-wave antenna with the novel perpendicular L-shape topology is integrated with a varactor-tuned high-electron mobility transistor (HEMT) voltage controlled oscillator (VCO) on the same plane Changing the VCO frequency, we can control not only the dual-beam scanning angle but also derive the power combining effect with the sum (/spl Sigma/) or difference (/spl Delta/) radiation patterns The power combing effect of difference mode, which is the dual-beam pattern and the sum mode pattern, which is a 3-beam pattern, with the 3rd beam located along the middle direction (45/spl deg/, 135/spl deg/) of the X and Y axes The measured scanning angle is steered over a range of 24-46/spl deg/ for the right beam and 127-148/spl deg/ for the left beam Compared with single microstrip leaky-wave antenna, the L-shape LWAs configuration has the advantages of switchable radiation patterns as the VCO varied from 10GHz to 106GHz

A 75-GHz Phase-Locked Loop in 90-nm CMOS Technology

Abstract: The design and experimental verification of a 75-GHz phase-locked loop (PLL) fabricated in 90-nm CMOS technology is presented. The circuit incorporates a three-quarter wavelength oscillator to achieve high-frequency operation and a novel phase-frequency detector (PFD) based on SSB mixers to suppress the reference feedthrough. The PLL demonstrates an operation range of 320 MHz and reference sidebands of less than -72 dBc while consuming 88 mW from a 1.45-V supply.

A balanced 1.5 GHz voltage controlled oscillator with an integrated LC resonator

Abstract: A monolithic voltage-controlled oscillator (VCO) is presented for low-power digital radio handsets. This circuit is fabricated in a production 0.8/spl mu/m 11GHz f/sub T/ BiCMOS process. The VCO is based on the common-collector Colpitts circuit in a balanced configuration to provide differential output for direct compatibility with prescaler and double-balanced mixer inputs. The circuit utilizes an integrated LC resonator comprised of coplanar inductors, polysilicon capacitors, and on-chip varactors. The fully-integrated inductors have an unloaded Q of approximately 5 at 2GHz.

Method and device relating to supervision and control of an oscillator signal

Abstract: The present invention relates to methods and devices for such control and supervision of an oscillator signal from a controllable oscillator that is done mainly to control the frequency variation of the oscillator signal. According to the invention, the controllable oscillator is controlled by a controlling voltage, which in turn is modified by a correction signal, generated in a control loop. A time discrete representation of a secondary phase is generated in the control loop, the secondary phase corresponding to a frequency being the difference between the frequency of the oscillator signal and a constant frequency. A time discrete approximation signal is generated in dependence of the time discrete representation of the secondary phase. A time discrete error signal is generated in dependence of the time discrete approximation signal, the time discrete error signal indicating the difference between the actual frequency slope of the oscillator signal and a desired frequency slope. The correction signal is generated in dependence of the time discrete error signal. The control loop can also be adaptive, meaning that data from one control sequence is being used in a later control sequence.

A fully integrated CMOS frequency synthesizer with charge-averaging charge pump and dual-path loop filter for PCS- and cellular-CDMA wireless systems

Abstract: A fully integrated CMOS frequency synthesizer for PCS- and cellular-CDMA systems is integrated in a 0.35-/spl mu/m CMOS technology. The proposed charge-averaging charge pump scheme suppresses fractional spurs to the level of noise, and the improved architecture of the dual-path loop filter makes it possible to implement a large time constant on a chip. With current-feedback bias and coarse tuning, a voltage-controlled oscillator (VCO) enables constant power and low gain of the VCO. Power dissipation is 60 mW with a 3.0-V supply. The proposed frequency synthesizer provides 10-kHz channel spacing with phase noise of -121 dBc/Hz in the PCS band and -127 dBc/Hz in the cellular band, both at 1-MHz offset frequency.